|
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741 |
- /* Copyright (C) 2014-2016 Ben Kurtovic <ben.kurtovic@gmail.com>
- Released under the terms of the MIT License. See LICENSE for details. */
-
- /*
- This file contains code to implement the Z80 instruction set. Since there
- are a lot of functions, it is kept separate from the main z80.c file. It is
- included in the middle of z80.c and should not be compiled separately.
-
- Most of this information can be found in the Z80 User Manual, Revision 06.
-
- Undocumented opcodes, flags, and some additional details come from:
- - http://clrhome.org/table/
- - http://www.z80.info/z80sflag.htm
- */
-
- typedef uint8_t (*DispatchTable[256])(Z80*, uint8_t);
-
- static DispatchTable instruction_table;
- static DispatchTable instruction_table_extended;
- static DispatchTable instruction_table_bits;
- static DispatchTable instruction_table_index;
- static DispatchTable instruction_table_index_bits;
-
- /*
- Unimplemented opcode handler.
- */
- static uint8_t z80_inst_unimplemented(Z80 *z80, uint8_t opcode)
- {
- z80->except = true;
- z80->exc_code = Z80_EXC_UNIMPLEMENTED_OPCODE;
- z80->exc_data = opcode;
- return 4;
- }
-
- /*
- LD r, r' (0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x47, 0x48, 0x49, 0x4A, 0x4B,
- 0x4C, 0x4D, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x57, 0x58, 0x59,
- 0x5A, 0x5B, 0x5C, 0x5D, 0x5F, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x67,
- 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6F, 0x78, 0x79, 0x7A, 0x7B, 0x7C,
- 0x7D, 0x7F):
- Load r' (8-bit register) into r (8-bit register).
- */
- static uint8_t z80_inst_ld_r_r(Z80 *z80, uint8_t opcode)
- {
- uint8_t *dst = extract_reg(z80, opcode),
- *src = extract_reg(z80, opcode << 3);
- *dst = *src;
- z80->regfile.pc++;
- return 4;
- }
-
- /*
- LD r, n (0x06, 0x0E, 0x16, 0x1E, 0x26, 0x2E, 0x3E):
- Load n (8-bit immediate) into r (8-bit register).
- */
- static uint8_t z80_inst_ld_r_n(Z80 *z80, uint8_t opcode)
- {
- uint8_t *reg = extract_reg(z80, opcode);
- *reg = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- z80->regfile.pc++;
- return 7;
- }
-
- /*
- LD r, (HL) (0x46, 0x4E, 0x56, 0x5E, 0x66, 0x6E, 0x7E):
- Load the contents of HL into r (8-bit register).
- */
- static uint8_t z80_inst_ld_r_hl(Z80 *z80, uint8_t opcode)
- {
- uint8_t *reg = extract_reg(z80, opcode);
- *reg = mmu_read_byte(z80->mmu, get_pair(z80, REG_HL));
- z80->regfile.pc++;
- return 7;
- }
-
- /*
- LD r, (IX+d)
- */
- // static uint8_t z80_inst_ld_r_ix(Z80 *z80, uint8_t opcode)
-
- /*
- LD r, (IY+d)
- */
- // static uint8_t z80_inst_ld_r_iy(Z80 *z80, uint8_t opcode)
-
- /*
- LD (HL), r
- */
- // static uint8_t z80_inst_ld_hl_r(Z80 *z80, uint8_t opcode)
-
- /*
- LD (IX+d), r
- */
- // static uint8_t z80_inst_ld_ix_r(Z80 *z80, uint8_t opcode)
-
- /*
- LD (IY+d), r
- */
- // static uint8_t z80_inst_ld_iy_r(Z80 *z80, uint8_t opcode)
-
- /*
- LD (HL), n (0x36):
- Load n (8-bit immediate) into the memory address pointed to by HL.
- */
- static uint8_t z80_inst_ld_hl_n(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- uint16_t addr = get_pair(z80, REG_HL);
- uint8_t byte = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- mmu_write_byte(z80->mmu, addr, byte);
- z80->regfile.pc++;
- return 10;
- }
-
- /*
- LD (IX+d), n
- */
- // static uint8_t z80_inst_ld_ix_n(Z80 *z80, uint8_t opcode)
-
- /*
- LD (IY+d), n
- */
- // static uint8_t z80_inst_ld_iy_n(Z80 *z80, uint8_t opcode)
-
- /*
- LD A, (BC)
- */
- // static uint8_t z80_inst_ld_a_bc(Z80 *z80, uint8_t opcode)
-
- /*
- LD A, (DE)
- */
- // static uint8_t z80_inst_ld_a_de(Z80 *z80, uint8_t opcode)
-
- /*
- LD A, (nn)
- */
- // static uint8_t z80_inst_ld_a_nn(Z80 *z80, uint8_t opcode)
-
- /*
- LD (BC), A
- */
- // static uint8_t z80_inst_ld_bc_a(Z80 *z80, uint8_t opcode)
-
- /*
- LD (DE), A
- */
- // static uint8_t z80_inst_ld_de_a(Z80 *z80, uint8_t opcode)
-
- /*
- LD (nn), A (0x32):
- Load a into memory address nn.
- */
- static uint8_t z80_inst_ld_nn_a(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- uint16_t addr = mmu_read_double(z80->mmu, ++z80->regfile.pc);
- mmu_write_byte(z80->mmu, addr, z80->regfile.a);
- z80->regfile.pc += 2;
- return 13;
- }
-
- /*
- LD A, I
- */
- // static uint8_t z80_inst_ld_a_i(Z80 *z80, uint8_t opcode)
-
- /*
- LD A, R
- */
- // static uint8_t z80_inst_ld_a_r(Z80 *z80, uint8_t opcode)
-
- /*
- LD I,A
- */
- // static uint8_t z80_inst_ld_i_a(Z80 *z80, uint8_t opcode)
-
- /*
- LD R, A
- */
- // static uint8_t z80_inst_ld_r_a(Z80 *z80, uint8_t opcode)
-
- /*
- LD dd, nn (0x01, 0x11, 0x21, 0x31):
- Load nn (16-bit immediate) into dd (16-bit register).
- */
- static uint8_t z80_inst_ld_dd_nn(Z80 *z80, uint8_t opcode)
- {
- uint8_t pair = extract_pair(opcode);
- set_pair(z80, pair, mmu_read_double(z80->mmu, ++z80->regfile.pc));
- z80->regfile.pc += 2;
- return 10;
- }
-
- // LD IX, nn
-
- // LD IY, nn
-
- // LD HL, (nn)
-
- // LD dd, (nn)
-
- // LD IX, (nn)
-
- // LD IY, (nn)
-
- // LD (nn), HL
-
- // LD (nn), dd
-
- // LD (nn), IX
-
- // LD (nn), IY
-
- // LD SP, HL
-
- // LD SP, IX
-
- // LD SP, IY
-
- // PUSH qq
-
- // PUSH IX
-
- // PUSH IY
-
- // POP qq
-
- // POP IX
-
- // POP IY
-
- // EX DE, HL
-
- // EX AF, AF′
-
- /*
- EXX (0xD9):
- Exchange the 16-bit registers with their shadows
- (BC <=> BC', DE <=> DE', HL <=> HL').
- */
- static uint8_t z80_inst_exx(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- uint16_t bc = get_pair(z80, REG_BC),
- de = get_pair(z80, REG_DE),
- hl = get_pair(z80, REG_HL);
-
- set_pair(z80, REG_BC, get_pair(z80, REG_BC_));
- set_pair(z80, REG_DE, get_pair(z80, REG_DE_));
- set_pair(z80, REG_HL, get_pair(z80, REG_HL_));
-
- set_pair(z80, REG_BC_, bc);
- set_pair(z80, REG_DE_, de);
- set_pair(z80, REG_HL_, hl);
- z80->regfile.pc++;
- return 4;
- }
-
- // EX (SP), HL
-
- // EX (SP), IX
-
- // EX (SP), IY
-
- // LDI
-
- // LDIR
-
- // LDD
-
- // LDDR
-
- // CPI
-
- // CPIR
-
- // CPD
-
- // CPDR
-
- // ADD A, r
-
- // ADD A, n
-
- // ADD A, (HL)
-
- // ADD A, (IX + d)
-
- // ADD A, (IY + d)
-
- // ADC A, s
-
- // SUB s
-
- // SBC A, s
-
- // AND s
-
- // OR s
-
- // XOR s
-
- /*
- XOR r (0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAF):
- Bitwise XOR a with r (8-bit register).
- */
- static uint8_t z80_inst_xor_r(Z80 *z80, uint8_t opcode)
- {
- uint8_t *reg = extract_reg(z80, opcode);
- uint8_t a = (z80->regfile.a ^= *reg);
-
- bool parity = !(__builtin_popcount(a) % 2);
- update_flags(z80, 0, 0, parity, !!(a & 0x08), 0, !!(a & 0x20), a == 0,
- !!(a & 0x80), 0xFF);
-
- z80->regfile.pc++;
- return 4;
- }
-
- // CP s
-
- /*
- CP r (0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBF):
- Set flags as if r (8-bit register) had been subtracted from a.
- */
- static uint8_t z80_inst_cp_r(Z80 *z80, uint8_t opcode)
- {
- uint8_t *reg = extract_reg(z80, opcode);
- uint8_t d = z80->regfile.a - *reg;
-
- bool c = (z80->regfile.a - *reg) != d;
- bool v = (z80->regfile.a - *reg) != ((int8_t) d);
- bool h = !!(((z80->regfile.a & 0x0F) - (*reg & 0x0F)) & 0x10);
- update_flags(z80, c, 1, v, !!(*reg & 0x08), h, !!(*reg & 0x20), d == 0,
- !!(d & 0x80), 0xFF);
-
- z80->regfile.pc++;
- return 4;
- }
-
- /*
- CP n (0xFE):
- Set flags as if n (8-bit immediate) had been subtracted from a.
- */
- static uint8_t z80_inst_cp_n(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- uint8_t n = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- uint8_t d = z80->regfile.a - n;
-
- bool c = (z80->regfile.a - n) != d;
- bool v = (z80->regfile.a - n) != ((int8_t) d);
- bool h = !!(((z80->regfile.a & 0x0F) - (n & 0x0F)) & 0x10);
- update_flags(z80, c, 1, v, !!(n & 0x08), h, !!(n & 0x20), d == 0,
- !!(d & 0x80), 0xFF);
-
- z80->regfile.pc++;
- return 7;
- }
-
- /*
- INC r (0x04, 0x0C, 0x14, 0x1C, 0x24, 0x2C, 0x3C):
- Increment r (8-bit register).
- */
- static uint8_t z80_inst_inc_r(Z80 *z80, uint8_t opcode)
- {
- uint8_t *reg = extract_reg(z80, opcode);
- bool halfcarry = !!(((*reg & 0x0F) + 1) & 0x10);
- (*reg)++;
- update_flags(z80, 0, 0, *reg == 0x80, !!(*reg & 0x08), halfcarry,
- !!(*reg & 0x20), *reg == 0, !!(*reg & 0x80), 0xFE);
-
- z80->regfile.pc++;
- return 4;
- }
-
- // INC (HL)
-
- // INC (IX+d)
-
- // INC (IY+d)
-
- // DEC m
-
- // DAA
-
- // CPL
-
- // NEG
-
- // CCF
-
- // SCF
-
- /*
- NOP (0x00):
- No operation is performed.
- */
- static uint8_t z80_inst_nop(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- z80->regfile.pc++;
- return 4;
- }
-
- /*
- HALT (0x76):
- Suspend CPU operation: execute NOPs until an interrupt or reset.
- */
- static uint8_t z80_inst_halt(Z80 *z80, uint8_t opcode)
- {
- (void) z80;
- (void) opcode;
- return 4;
- }
-
- /*
- DI (0xF3):
- Disable maskable interrupts by resetting both flip-flops.
- */
- static uint8_t z80_inst_di(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- z80->regfile.iff1 = false;
- z80->regfile.iff2 = false;
- z80->regfile.pc++;
- return 4;
- }
-
- /*
- EI (0xFB):
- Enable maskable interrupts by setting both flip-flops.
- */
- static uint8_t z80_inst_ei(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- z80->regfile.iff1 = true;
- z80->regfile.iff2 = true;
- z80->regfile.pc++;
- return 4;
- }
-
- /*
- IM (0xED46, 0xED4E, 0xED56, 0xED5E, 0xED66, 0xED6E, 0xED76, 0xED7E):
- Set the interrupt mode.
- */
- static uint8_t z80_inst_im(Z80 *z80, uint8_t opcode)
- {
- switch (opcode) {
- case 0x46:
- case 0x4E:
- case 0x66:
- case 0x6E:
- z80->regfile.im_a = false; // Interrupt mode 0
- z80->regfile.im_b = false;
- break;
- case 0x56:
- case 0x76:
- z80->regfile.im_a = true; // Interrupt mode 1
- z80->regfile.im_b = false;
- break;
- case 0x5E:
- case 0x7E:
- z80->regfile.im_a = true; // Interrupt mode 2
- z80->regfile.im_b = true;
- break;
- }
-
- z80->regfile.pc++;
- return 8;
- }
-
- // ADD HL, ss
-
- // ADC HL, ss
-
- // SBC HL, ss
-
- // ADD IX, pp
-
- // ADD IY, rr
-
- /*
- INC ss (0x03, 0x13, 0x23, 0x33):
- Increment ss (16-bit register).
- */
- static uint8_t z80_inst_inc_ss(Z80 *z80, uint8_t opcode)
- {
- uint8_t pair = extract_pair(opcode);
- set_pair(z80, pair, get_pair(z80, pair) + 1);
- z80->regfile.pc++;
- return 6;
- }
-
- // INC IX
-
- // INC IY
-
- // DEC ss
-
- // DEC IX
-
- // DEC IY
-
- // RLCA
-
- // RLA
-
- // RRCA
-
- // RRA
-
- // RLC r
-
- // RLC (HL)
-
- // RLC (IX+d)
-
- // RLC (IY+d)
-
- // RL m
-
- // RRC m
-
- // RR m
-
- // SLA m
-
- // SRA m
-
- // SRL m
-
- // RLD
-
- // RRD
-
- // BIT b, r
-
- // BIT b, (HL)
-
- // BIT b, (IX+d)
-
- // BIT b, (IY+d)
-
- // SET b, r
-
- // SET b, (HL)
-
- // SET b, (IX+d)
-
- // SET b, (IY+d)
-
- // RES b, m
-
- /*
- JP nn (0xC3):
- Jump to nn (16-bit immediate).
- */
- static uint8_t z80_inst_jp_nn(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- z80->regfile.pc = mmu_read_double(z80->mmu, ++z80->regfile.pc);
- return 10;
- }
-
- /*
- JP cc, nn (0xC2, 0xCA, 0xD2, 0xDA, 0xE2, 0xEA, 0xF2, 0xFA):
- Jump to nn (16-bit immediate) if cc (condition) is true.
- */
- static uint8_t z80_inst_jp_cc_nn(Z80 *z80, uint8_t opcode)
- {
- if (extract_cond(z80, opcode))
- z80->regfile.pc = mmu_read_double(z80->mmu, ++z80->regfile.pc);
- else
- z80->regfile.pc += 3;
- return 10;
- }
-
- /*
- JR e (0x18):
- Relative jump e (signed 8-bit immediate) bytes.
- */
- static uint8_t z80_inst_jr_e(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- int8_t jump = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- z80->regfile.pc += jump + 2;
- return 12;
- }
-
-
- /*
- JR cc, e (0x20, 0x28, 0x30, 0x38):
- Relative jump e (signed 8-bit immediate) bytes if cc (condition) is true.
- */
- static uint8_t z80_inst_jr_cc_e(Z80 *z80, uint8_t opcode)
- {
- if (extract_cond(z80, opcode - 0x20)) {
- int8_t jump = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- z80->regfile.pc += jump + 2;
- return 12;
- } else {
- z80->regfile.pc += 2;
- return 7;
- }
- }
-
- // JP (HL)
-
- // JP (IX)
-
- // JP (IY)
-
- // DJNZ, e
-
- /*
- CALL nn (0xCD):
- Push PC+3 onto the stack and jump to nn (16-bit immediate).
- */
- static uint8_t z80_inst_call_nn(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- stack_push(z80, z80->regfile.pc + 3);
- z80->regfile.pc = mmu_read_double(z80->mmu, ++z80->regfile.pc);
- return 17;
- }
-
- /*
- CALL cc, nn (0xC4, 0xCC, 0xD4, 0xDC, 0xE4, 0xEC, 0xF4, 0xFC):
- Push PC+3 onto the stack and jump to nn (16-bit immediate) if cc is true.
- */
- static uint8_t z80_inst_call_cc_nn(Z80 *z80, uint8_t opcode)
- {
- if (extract_cond(z80, opcode)) {
- stack_push(z80, z80->regfile.pc + 3);
- z80->regfile.pc = mmu_read_double(z80->mmu, ++z80->regfile.pc);
- return 17;
- } else {
- z80->regfile.pc += 3;
- return 10;
- }
- }
-
- // RET
-
- // RET cc
-
- // RETI
-
- // RETN
-
- // RST p
-
- /*
- IN A, (n): (0xDB):
- Read a byte from port n into a.
- */
- static uint8_t z80_inst_in_a_n(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- uint8_t port = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- z80->regfile.a = read_port(z80, port);
- z80->regfile.pc++;
- return 11;
- }
-
- // IN r (C)
-
- // INI
-
- // INIR
-
- // IND
-
- // INDR
-
- /*
- OUT (n), A: (0xD3):
- Write a byte from a into port n.
- */
- static uint8_t z80_inst_out_n_a(Z80 *z80, uint8_t opcode)
- {
- (void) opcode;
- uint8_t port = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- write_port(z80, port, z80->regfile.a);
- z80->regfile.pc++;
- return 11;
- }
-
- // OUT (C), r
-
- // OUTI
-
- // OTIR
-
- // OUTD
-
- // OTDR
-
- /*
- 0xED:
- Handle an extended instruction.
- */
- static uint8_t z80_prefix_extended(Z80 *z80, uint8_t opcode)
- {
- opcode = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- return (*instruction_table_extended[opcode])(z80, opcode);
- }
-
- /*
- 0xED:
- Handle a bit instruction.
- */
- static uint8_t z80_prefix_bits(Z80 *z80, uint8_t opcode)
- {
- opcode = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- return (*instruction_table_bits[opcode])(z80, opcode);
- }
-
- /*
- 0xDD, 0xFD:
- Handle an index instruction.
- */
- static uint8_t z80_prefix_index(Z80 *z80, uint8_t opcode)
- {
- opcode = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- return (*instruction_table_index[opcode])(z80, opcode);
- }
-
- /*
- 0xDDCB, 0xFDCB:
- Handle an index-bit instruction.
- */
- static uint8_t z80_prefix_index_bits(Z80 *z80, uint8_t opcode)
- {
- opcode = mmu_read_byte(z80->mmu, ++z80->regfile.pc);
- return (*instruction_table_index_bits[opcode])(z80, opcode);
- }
-
- #include "z80_tables.inc.c"
|