diff --git a/scripts/update_asm_instructions.py b/scripts/update_asm_instructions.py index 537ceda..2897d5f 100755 --- a/scripts/update_asm_instructions.py +++ b/scripts/update_asm_instructions.py @@ -268,14 +268,12 @@ class Instruction(object): indexed = self._handle_case(case) case["type"][index] = "indirect" - for subcase in case["cases"]: - if subcase["cond"][index] != "_": - raise RuntimeError( - "indirect_hl_or_indexed pseudo-type requires a " - "wildcard (_) in all corresponding conditionals") - subcase["cond"][index] = "reg.hl" - - return self._handle_case(case) + indexed + indirect = self._handle_case(case) + base_cond = self._build_case_type_check(case["type"]) + hl_reg = TAB * 3 + self._build_indirect_check(index, "reg.hl") + indirect[0] = TAB + "if ({0} &&\n{1}) {{".format(base_cond, hl_reg) + + return indirect + indexed raise RuntimeError("Unknown pseudo-type: {0}".format(pseudo)) diff --git a/src/assembler/instructions.inc.c b/src/assembler/instructions.inc.c index 350716b..d33f4b5 100644 --- a/src/assembler/instructions.inc.c +++ b/src/assembler/instructions.inc.c @@ -7,7 +7,7 @@ `make` should trigger a rebuild when it is modified; if not, use: `python scripts/update_asm_instructions.py`. - @AUTOGEN_DATE Mon May 18 05:16:08 2015 UTC + @AUTOGEN_DATE Mon May 18 05:31:58 2015 UTC */ /* @AUTOGEN_INST_BLOCK_START */ @@ -57,8 +57,9 @@ INST_FUNC(adc) INST_RETURN(2, 0xCE, INST_IMM(1).uval) INST_ERROR(ARG_VALUE) } - if (INST_NARGS == 2 && INST_TYPE(0) == AT_REGISTER && INST_TYPE(1) == AT_INDIRECT) { - if (INST_REG(0) == REG_A && (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) + if (INST_NARGS == 2 && INST_TYPE(0) == AT_REGISTER && INST_TYPE(1) == AT_INDIRECT && + (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) { + if (INST_REG(0) == REG_A) INST_RETURN(1, 0x8E) INST_ERROR(ARG_VALUE) } @@ -131,8 +132,9 @@ INST_FUNC(add) INST_RETURN(2, 0xC6, INST_IMM(1).uval) INST_ERROR(ARG_VALUE) } - if (INST_NARGS == 2 && INST_TYPE(0) == AT_REGISTER && INST_TYPE(1) == AT_INDIRECT) { - if (INST_REG(0) == REG_A && (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) + if (INST_NARGS == 2 && INST_TYPE(0) == AT_REGISTER && INST_TYPE(1) == AT_INDIRECT && + (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) { + if (INST_REG(0) == REG_A) INST_RETURN(1, 0x86) INST_ERROR(ARG_VALUE) } @@ -254,8 +256,9 @@ INST_FUNC(inc) INST_RETURN(1, 0x33) INST_ERROR(ARG_VALUE) } - if (INST_NARGS == 1 && INST_TYPE(0) == AT_INDIRECT) { - if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL)) + if (INST_NARGS == 1 && INST_TYPE(0) == AT_INDIRECT && + (INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL)) { + if (1) INST_RETURN(1, 0x34) INST_ERROR(ARG_VALUE) } @@ -550,20 +553,21 @@ INST_FUNC(ld) INST_RETURN(3, 0x31, INST_IMM_U16_B1(INST_IMM(1)), INST_IMM_U16_B2(INST_IMM(1))) INST_ERROR(ARG_VALUE) } - if (INST_NARGS == 2 && INST_TYPE(0) == AT_REGISTER && INST_TYPE(1) == AT_INDIRECT) { - if (INST_REG(0) == REG_A && (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) + if (INST_NARGS == 2 && INST_TYPE(0) == AT_REGISTER && INST_TYPE(1) == AT_INDIRECT && + (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) { + if (INST_REG(0) == REG_A) INST_RETURN(1, 0x7E) - if (INST_REG(0) == REG_B && (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) + if (INST_REG(0) == REG_B) INST_RETURN(1, 0x46) - if (INST_REG(0) == REG_C && (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) + if (INST_REG(0) == REG_C) INST_RETURN(1, 0x4E) - if (INST_REG(0) == REG_D && (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) + if (INST_REG(0) == REG_D) INST_RETURN(1, 0x56) - if (INST_REG(0) == REG_E && (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) + if (INST_REG(0) == REG_E) INST_RETURN(1, 0x5E) - if (INST_REG(0) == REG_H && (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) + if (INST_REG(0) == REG_H) INST_RETURN(1, 0x66) - if (INST_REG(0) == REG_L && (INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) + if (INST_REG(0) == REG_L) INST_RETURN(1, 0x6E) INST_ERROR(ARG_VALUE) } @@ -605,20 +609,21 @@ INST_FUNC(ld) INST_RETURN(4, 0xED, 0x7B, INST_IMM_U16_B1(INST_INDIRECT(1).addr.imm), INST_IMM_U16_B2(INST_INDIRECT(1).addr.imm)) INST_ERROR(ARG_VALUE) } - if (INST_NARGS == 2 && INST_TYPE(0) == AT_INDIRECT && INST_TYPE(1) == AT_REGISTER) { - if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL) && INST_REG(1) == REG_A) + if (INST_NARGS == 2 && INST_TYPE(0) == AT_INDIRECT && INST_TYPE(1) == AT_REGISTER && + (INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL)) { + if (INST_REG(1) == REG_A) INST_RETURN(1, 0x77) - if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL) && INST_REG(1) == REG_B) + if (INST_REG(1) == REG_B) INST_RETURN(1, 0x70) - if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL) && INST_REG(1) == REG_C) + if (INST_REG(1) == REG_C) INST_RETURN(1, 0x71) - if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL) && INST_REG(1) == REG_D) + if (INST_REG(1) == REG_D) INST_RETURN(1, 0x72) - if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL) && INST_REG(1) == REG_E) + if (INST_REG(1) == REG_E) INST_RETURN(1, 0x73) - if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL) && INST_REG(1) == REG_H) + if (INST_REG(1) == REG_H) INST_RETURN(1, 0x74) - if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL) && INST_REG(1) == REG_L) + if (INST_REG(1) == REG_L) INST_RETURN(1, 0x75) INST_ERROR(ARG_VALUE) } @@ -639,8 +644,9 @@ INST_FUNC(ld) INST_RETURN(3, INST_INDEX_PREFIX(0), 0x75, INST_INDEX(0).offset) INST_ERROR(ARG_VALUE) } - if (INST_NARGS == 2 && INST_TYPE(0) == AT_INDIRECT && INST_TYPE(1) == AT_IMMEDIATE) { - if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL) && INST_IMM(1).mask & IMM_U8) + if (INST_NARGS == 2 && INST_TYPE(0) == AT_INDIRECT && INST_TYPE(1) == AT_IMMEDIATE && + (INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL)) { + if (INST_IMM(1).mask & IMM_U8) INST_RETURN(2, 0x36, INST_IMM(1).uval) INST_ERROR(ARG_VALUE) } diff --git a/src/assembler/instructions.yml b/src/assembler/instructions.yml index dc4e5e0..104a64a 100644 --- a/src/assembler/instructions.yml +++ b/src/assembler/instructions.yml @@ -84,15 +84,15 @@ add: # and: # args: yes -# return: error +# return: TODO # bit: # args: yes -# return: error +# return: TODO # call: # args: yes -# return: error +# return: TODO ccf: args: no @@ -100,7 +100,7 @@ ccf: # cp: # args: yes -# return: error +# return: TODO cpd: args: no @@ -128,7 +128,7 @@ daa: # dec: # args: yes -# return: error +# return: TODO di: args: no @@ -136,7 +136,7 @@ di: # djnz: # args: yes -# return: error +# return: TODO ei: args: no @@ -144,7 +144,7 @@ ei: # ex: # args: yes -# return: error +# return: TODO exx: args: no @@ -156,11 +156,11 @@ halt: # im: # args: yes -# return: error +# return: TODO # in: # args: yes -# return: error +# return: TODO inc: args: yes @@ -212,11 +212,11 @@ inir: # jp: # args: yes -# return: error +# return: TODO # jr: # args: yes -# return: error +# return: TODO ld: args: yes @@ -387,7 +387,7 @@ ld: return: [0xED, 0x5B, u16] - cond: [sp, imm] return: [0xED, 0x7B, u16] - - type: [indirect_hl_or_indexed, register] # TODO, support both this and regular indirect + - type: [indirect_hl_or_indexed, register] cases: - cond: [_, a] return: [0x77] @@ -450,7 +450,7 @@ nop: # or: # args: yes -# return: error +# return: TODO otdr: args: no @@ -462,7 +462,7 @@ otir: # out: # args: yes -# return: error +# return: TODO outd: args: no @@ -474,19 +474,19 @@ outi: # pop: # args: yes -# return: error +# return: TODO # push: # args: yes -# return: error +# return: TODO # res: # args: yes -# return: error +# return: TODO # ret: # args: yes -# return: error +# return: TODO reti: args: no @@ -498,7 +498,7 @@ retn: # rl: # args: yes -# return: error +# return: TODO rla: args: no @@ -506,7 +506,7 @@ rla: # rlc: # args: yes -# return: error +# return: TODO rlca: args: no @@ -518,7 +518,7 @@ rld: # rr: # args: yes -# return: error +# return: TODO rra: args: no @@ -526,7 +526,7 @@ rra: # rrc: # args: yes -# return: error +# return: TODO rrca: args: no @@ -534,15 +534,15 @@ rrca: # rrd: # args: yes -# return: error +# return: TODO # rst: # args: yes -# return: error +# return: TODO # sbc: # args: yes -# return: error +# return: TODO scf: args: no @@ -550,36 +550,36 @@ scf: # set: # args: yes -# return: error +# return: TODO # sl1: # args: yes -# return: error +# return: TODO # sla: # args: yes -# return: error +# return: TODO # sll: # args: yes -# return: error +# return: TODO # sls: # args: yes -# return: error +# return: TODO # sra: # args: yes -# return: error +# return: TODO # srl: # args: yes -# return: error +# return: TODO # sub: # args: yes -# return: error +# return: TODO # xor: # args: yes -# return: error +# return: TODO