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Implement BIT instruction.

master
Ben Kurtovic 9 anni fa
parent
commit
631bd33b64
2 ha cambiato i file con 301 aggiunte e 4 eliminazioni
  1. +166
    -1
      src/assembler/instructions.inc.c
  2. +135
    -3
      src/assembler/instructions.yml

+ 166
- 1
src/assembler/instructions.inc.c Vedi File

@@ -7,7 +7,7 @@
`make` should trigger a rebuild when it is modified; if not, use:
`python scripts/update_asm_instructions.py`.

@AUTOGEN_DATE Mon May 18 08:27:39 2015 UTC
@AUTOGEN_DATE Mon May 18 08:39:52 2015 UTC
*/

/* @AUTOGEN_INST_BLOCK_START */
@@ -193,6 +193,170 @@ INST_FUNC(and)
INST_ERROR(ARG_TYPE)
}

INST_FUNC(bit)
{
INST_TAKES_ARGS(
AT_IMMEDIATE,
AT_INDEXED|AT_INDIRECT|AT_REGISTER,
AT_NONE
)
if (INST_NARGS == 2 && INST_TYPE(0) == AT_IMMEDIATE && INST_TYPE(1) == AT_REGISTER) {
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 0) && INST_REG(1) == REG_A)
INST_RETURN(2, 0xCB, 0x47)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 0) && INST_REG(1) == REG_B)
INST_RETURN(2, 0xCB, 0x40)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 0) && INST_REG(1) == REG_C)
INST_RETURN(2, 0xCB, 0x41)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 0) && INST_REG(1) == REG_D)
INST_RETURN(2, 0xCB, 0x42)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 0) && INST_REG(1) == REG_E)
INST_RETURN(2, 0xCB, 0x43)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 0) && INST_REG(1) == REG_H)
INST_RETURN(2, 0xCB, 0x44)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 0) && INST_REG(1) == REG_L)
INST_RETURN(2, 0xCB, 0x45)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 1) && INST_REG(1) == REG_A)
INST_RETURN(2, 0xCB, 0x4F)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 1) && INST_REG(1) == REG_B)
INST_RETURN(2, 0xCB, 0x48)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 1) && INST_REG(1) == REG_C)
INST_RETURN(2, 0xCB, 0x49)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 1) && INST_REG(1) == REG_D)
INST_RETURN(2, 0xCB, 0x4A)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 1) && INST_REG(1) == REG_E)
INST_RETURN(2, 0xCB, 0x4B)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 1) && INST_REG(1) == REG_H)
INST_RETURN(2, 0xCB, 0x4C)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 1) && INST_REG(1) == REG_L)
INST_RETURN(2, 0xCB, 0x4D)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 2) && INST_REG(1) == REG_A)
INST_RETURN(2, 0xCB, 0x57)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 2) && INST_REG(1) == REG_B)
INST_RETURN(2, 0xCB, 0x50)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 2) && INST_REG(1) == REG_C)
INST_RETURN(2, 0xCB, 0x51)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 2) && INST_REG(1) == REG_D)
INST_RETURN(2, 0xCB, 0x52)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 2) && INST_REG(1) == REG_E)
INST_RETURN(2, 0xCB, 0x53)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 2) && INST_REG(1) == REG_H)
INST_RETURN(2, 0xCB, 0x54)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 2) && INST_REG(1) == REG_L)
INST_RETURN(2, 0xCB, 0x55)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 3) && INST_REG(1) == REG_A)
INST_RETURN(2, 0xCB, 0x5F)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 3) && INST_REG(1) == REG_B)
INST_RETURN(2, 0xCB, 0x58)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 3) && INST_REG(1) == REG_C)
INST_RETURN(2, 0xCB, 0x59)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 3) && INST_REG(1) == REG_D)
INST_RETURN(2, 0xCB, 0x5A)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 3) && INST_REG(1) == REG_E)
INST_RETURN(2, 0xCB, 0x5B)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 3) && INST_REG(1) == REG_H)
INST_RETURN(2, 0xCB, 0x5C)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 3) && INST_REG(1) == REG_L)
INST_RETURN(2, 0xCB, 0x5D)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 4) && INST_REG(1) == REG_A)
INST_RETURN(2, 0xCB, 0x67)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 4) && INST_REG(1) == REG_B)
INST_RETURN(2, 0xCB, 0x60)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 4) && INST_REG(1) == REG_C)
INST_RETURN(2, 0xCB, 0x61)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 4) && INST_REG(1) == REG_D)
INST_RETURN(2, 0xCB, 0x62)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 4) && INST_REG(1) == REG_E)
INST_RETURN(2, 0xCB, 0x63)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 4) && INST_REG(1) == REG_H)
INST_RETURN(2, 0xCB, 0x64)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 4) && INST_REG(1) == REG_L)
INST_RETURN(2, 0xCB, 0x65)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 5) && INST_REG(1) == REG_A)
INST_RETURN(2, 0xCB, 0x6F)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 5) && INST_REG(1) == REG_B)
INST_RETURN(2, 0xCB, 0x68)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 5) && INST_REG(1) == REG_C)
INST_RETURN(2, 0xCB, 0x69)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 5) && INST_REG(1) == REG_D)
INST_RETURN(2, 0xCB, 0x6A)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 5) && INST_REG(1) == REG_E)
INST_RETURN(2, 0xCB, 0x6B)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 5) && INST_REG(1) == REG_H)
INST_RETURN(2, 0xCB, 0x6C)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 5) && INST_REG(1) == REG_L)
INST_RETURN(2, 0xCB, 0x6D)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 6) && INST_REG(1) == REG_A)
INST_RETURN(2, 0xCB, 0x77)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 6) && INST_REG(1) == REG_B)
INST_RETURN(2, 0xCB, 0x70)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 6) && INST_REG(1) == REG_C)
INST_RETURN(2, 0xCB, 0x71)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 6) && INST_REG(1) == REG_D)
INST_RETURN(2, 0xCB, 0x72)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 6) && INST_REG(1) == REG_E)
INST_RETURN(2, 0xCB, 0x73)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 6) && INST_REG(1) == REG_H)
INST_RETURN(2, 0xCB, 0x74)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 6) && INST_REG(1) == REG_L)
INST_RETURN(2, 0xCB, 0x75)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 7) && INST_REG(1) == REG_A)
INST_RETURN(2, 0xCB, 0x7F)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 7) && INST_REG(1) == REG_B)
INST_RETURN(2, 0xCB, 0x78)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 7) && INST_REG(1) == REG_C)
INST_RETURN(2, 0xCB, 0x79)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 7) && INST_REG(1) == REG_D)
INST_RETURN(2, 0xCB, 0x7A)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 7) && INST_REG(1) == REG_E)
INST_RETURN(2, 0xCB, 0x7B)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 7) && INST_REG(1) == REG_H)
INST_RETURN(2, 0xCB, 0x7C)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 7) && INST_REG(1) == REG_L)
INST_RETURN(2, 0xCB, 0x7D)
INST_ERROR(ARG_VALUE)
}
if (INST_NARGS == 2 && INST_TYPE(0) == AT_IMMEDIATE && INST_TYPE(1) == AT_INDIRECT &&
(INST_INDIRECT(1).type == AT_REGISTER && INST_INDIRECT(1).addr.reg == REG_HL)) {
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 0))
INST_RETURN(2, 0xCB, 0x46)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 1))
INST_RETURN(2, 0xCB, 0x4E)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 2))
INST_RETURN(2, 0xCB, 0x56)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 3))
INST_RETURN(2, 0xCB, 0x5E)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 4))
INST_RETURN(2, 0xCB, 0x66)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 5))
INST_RETURN(2, 0xCB, 0x6E)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 6))
INST_RETURN(2, 0xCB, 0x76)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 7))
INST_RETURN(2, 0xCB, 0x7E)
INST_ERROR(ARG_VALUE)
}
if (INST_NARGS == 2 && INST_TYPE(0) == AT_IMMEDIATE && INST_TYPE(1) == AT_INDEXED) {
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 0))
INST_RETURN(4, INST_INDEX_PREFIX(1), 0xCB, INST_INDEX(1).offset, 0x46)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 1))
INST_RETURN(4, INST_INDEX_PREFIX(1), 0xCB, INST_INDEX(1).offset, 0x4E)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 2))
INST_RETURN(4, INST_INDEX_PREFIX(1), 0xCB, INST_INDEX(1).offset, 0x56)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 3))
INST_RETURN(4, INST_INDEX_PREFIX(1), 0xCB, INST_INDEX(1).offset, 0x5E)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 4))
INST_RETURN(4, INST_INDEX_PREFIX(1), 0xCB, INST_INDEX(1).offset, 0x66)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 5))
INST_RETURN(4, INST_INDEX_PREFIX(1), 0xCB, INST_INDEX(1).offset, 0x6E)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 6))
INST_RETURN(4, INST_INDEX_PREFIX(1), 0xCB, INST_INDEX(1).offset, 0x76)
if ((INST_IMM(0).mask & IMM_BIT && !INST_IMM(0).is_label && INST_IMM(0).uval == 7))
INST_RETURN(4, INST_INDEX_PREFIX(1), 0xCB, INST_INDEX(1).offset, 0x7E)
INST_ERROR(ARG_VALUE)
}
INST_ERROR(ARG_TYPE)
}

INST_FUNC(ccf)
{
INST_TAKES_NO_ARGS
@@ -841,6 +1005,7 @@ static ASMInstParser lookup_parser(uint32_t key)
HANDLE(adc)
HANDLE(add)
HANDLE(and)
HANDLE(bit)
HANDLE(ccf)
HANDLE(cpd)
HANDLE(cpdr)


+ 135
- 3
src/assembler/instructions.yml Vedi File

@@ -110,9 +110,141 @@ and:
- cond: [_]
return: [0xA6]

# bit:
# args: yes
# return: TODO
bit:
args: yes
cases:
- type: [immediate, register]
cases:
- cond: [bit.0, a]
return: [0xCB, 0x47]
- cond: [bit.0, b]
return: [0xCB, 0x40]
- cond: [bit.0, c]
return: [0xCB, 0x41]
- cond: [bit.0, d]
return: [0xCB, 0x42]
- cond: [bit.0, e]
return: [0xCB, 0x43]
- cond: [bit.0, h]
return: [0xCB, 0x44]
- cond: [bit.0, l]
return: [0xCB, 0x45]
- cond: [bit.1, a]
return: [0xCB, 0x4F]
- cond: [bit.1, b]
return: [0xCB, 0x48]
- cond: [bit.1, c]
return: [0xCB, 0x49]
- cond: [bit.1, d]
return: [0xCB, 0x4A]
- cond: [bit.1, e]
return: [0xCB, 0x4B]
- cond: [bit.1, h]
return: [0xCB, 0x4C]
- cond: [bit.1, l]
return: [0xCB, 0x4D]
- cond: [bit.2, a]
return: [0xCB, 0x57]
- cond: [bit.2, b]
return: [0xCB, 0x50]
- cond: [bit.2, c]
return: [0xCB, 0x51]
- cond: [bit.2, d]
return: [0xCB, 0x52]
- cond: [bit.2, e]
return: [0xCB, 0x53]
- cond: [bit.2, h]
return: [0xCB, 0x54]
- cond: [bit.2, l]
return: [0xCB, 0x55]
- cond: [bit.3, a]
return: [0xCB, 0x5F]
- cond: [bit.3, b]
return: [0xCB, 0x58]
- cond: [bit.3, c]
return: [0xCB, 0x59]
- cond: [bit.3, d]
return: [0xCB, 0x5A]
- cond: [bit.3, e]
return: [0xCB, 0x5B]
- cond: [bit.3, h]
return: [0xCB, 0x5C]
- cond: [bit.3, l]
return: [0xCB, 0x5D]
- cond: [bit.4, a]
return: [0xCB, 0x67]
- cond: [bit.4, b]
return: [0xCB, 0x60]
- cond: [bit.4, c]
return: [0xCB, 0x61]
- cond: [bit.4, d]
return: [0xCB, 0x62]
- cond: [bit.4, e]
return: [0xCB, 0x63]
- cond: [bit.4, h]
return: [0xCB, 0x64]
- cond: [bit.4, l]
return: [0xCB, 0x65]
- cond: [bit.5, a]
return: [0xCB, 0x6F]
- cond: [bit.5, b]
return: [0xCB, 0x68]
- cond: [bit.5, c]
return: [0xCB, 0x69]
- cond: [bit.5, d]
return: [0xCB, 0x6A]
- cond: [bit.5, e]
return: [0xCB, 0x6B]
- cond: [bit.5, h]
return: [0xCB, 0x6C]
- cond: [bit.5, l]
return: [0xCB, 0x6D]
- cond: [bit.6, a]
return: [0xCB, 0x77]
- cond: [bit.6, b]
return: [0xCB, 0x70]
- cond: [bit.6, c]
return: [0xCB, 0x71]
- cond: [bit.6, d]
return: [0xCB, 0x72]
- cond: [bit.6, e]
return: [0xCB, 0x73]
- cond: [bit.6, h]
return: [0xCB, 0x74]
- cond: [bit.6, l]
return: [0xCB, 0x75]
- cond: [bit.7, a]
return: [0xCB, 0x7F]
- cond: [bit.7, b]
return: [0xCB, 0x78]
- cond: [bit.7, c]
return: [0xCB, 0x79]
- cond: [bit.7, d]
return: [0xCB, 0x7A]
- cond: [bit.7, e]
return: [0xCB, 0x7B]
- cond: [bit.7, h]
return: [0xCB, 0x7C]
- cond: [bit.7, l]
return: [0xCB, 0x7D]
- type: [immediate, indirect_hl_or_indexed]
cases:
- cond: [bit.0, _]
return: [0xCB, 0x46]
- cond: [bit.1, _]
return: [0xCB, 0x4E]
- cond: [bit.2, _]
return: [0xCB, 0x56]
- cond: [bit.3, _]
return: [0xCB, 0x5E]
- cond: [bit.4, _]
return: [0xCB, 0x66]
- cond: [bit.5, _]
return: [0xCB, 0x6E]
- cond: [bit.6, _]
return: [0xCB, 0x76]
- cond: [bit.7, _]
return: [0xCB, 0x7E]

# call:
# args: yes


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