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Fix cycle timing.

master
Ben Kurtovic 9 years ago
parent
commit
989d4938af
1 changed files with 1 additions and 1 deletions
  1. +1
    -1
      src/z80.c

+ 1
- 1
src/z80.c View File

@@ -163,7 +163,7 @@ bool z80_do_cycles(Z80 *z80, double cycles)
while (cycles > 0 && !z80->except) {
uint8_t opcode = mmu_read_byte(z80->mmu, z80->regfile.pc);
increment_refresh_counter(z80);
cycles -= (*instruction_lookup_table[opcode])(z80, opcode) - 2;
cycles -= (*instruction_lookup_table[opcode])(z80, opcode);
}

z80->pending_cycles = -cycles;


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