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@@ -14,6 +14,14 @@ |
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/* Internal structs */ |
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/* Internal structs */ |
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typedef struct { |
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typedef struct { |
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size_t size; |
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const ASMLine **overlap_table; |
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const ASMLine *origin; |
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uint8_t bank; |
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bool cross_blocks; |
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} ASMLayoutInfo; |
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typedef struct { |
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int8_t slots[MMU_NUM_ROM_BANKS]; |
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int8_t slots[MMU_NUM_ROM_BANKS]; |
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const ASMLine *lines[MMU_NUM_ROM_BANKS]; |
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const ASMLine *lines[MMU_NUM_ROM_BANKS]; |
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} ASMSlotInfo; |
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} ASMSlotInfo; |
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@@ -33,7 +41,7 @@ static inline uint16_t map_into_slot(size_t offset, int8_t slot) |
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/* |
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/* |
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Return the default slot associated with a given memory bank. |
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Return the default slot associated with a given memory bank. |
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*/ |
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*/ |
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static inline int8_t default_bank_slot(size_t bank) |
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static inline int8_t default_bank_slot(uint8_t bank) |
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{ |
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{ |
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return bank > 2 ? 2 : bank; |
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return bank > 2 ? 2 : bank; |
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} |
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} |
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@@ -84,7 +92,7 @@ static ErrorInfo* handle_origin_directive(const ASMLine *line, size_t *offset) |
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if (!dparse_uint32_t(&arg, line, DIR_ORIGIN)) |
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if (!dparse_uint32_t(&arg, line, DIR_ORIGIN)) |
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return error_info_create(line, ET_PREPROC, ED_PP_BAD_ARG); |
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return error_info_create(line, ET_PREPROC, ED_PP_BAD_ARG); |
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if (arg >= MMU_NUM_ROM_BANKS * MMU_ROM_BANK_SIZE) |
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if (arg >= ROM_SIZE_MAX) |
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return error_info_create(line, ET_PREPROC, ED_PP_ARG_RANGE); |
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return error_info_create(line, ET_PREPROC, ED_PP_ARG_RANGE); |
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*offset = arg; |
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*offset = arg; |
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@@ -193,24 +201,24 @@ static ErrorInfo* parse_instruction( |
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} |
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} |
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/* |
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/* |
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Check if the given location overlaps with any existing objects. |
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Check if the given object location is legal. |
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Checks include ROM size bounding, overlapping with existing objects, and |
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block-crossing assuming the .cross_blocks directive has not been specified. |
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On success, return NULL and add the location to the overlap table. |
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On success, return NULL and add the location to the overlap table. |
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On failure, return an ErrorInfo object. |
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On failure, return an ErrorInfo object. |
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*/ |
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*/ |
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static ErrorInfo* check_layout( |
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static ErrorInfo* check_layout( |
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const ASMLine **overlap_table, size_t size, const ASMLocation *loc, |
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const ASMLine *line, const ASMLine *origin) |
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ASMLayoutInfo *li, const ASMLocation *loc, const ASMLine *line) |
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{ |
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{ |
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// TODO: never let boundaries cross without state->cross_blocks |
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const ASMLine *clash = NULL; |
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const ASMLine *clash = NULL; |
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if (loc->offset + loc->length > size) { |
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if (loc->offset + loc->length > li->size) { |
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clash = &bounds_sentinel; |
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clash = &bounds_sentinel; |
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} else { |
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} else { |
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for (size_t i = 0; i < loc->length; i++) { |
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for (size_t i = 0; i < loc->length; i++) { |
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if (overlap_table[loc->offset + i]) { |
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clash = overlap_table[loc->offset + i]; |
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if (li->overlap_table[loc->offset + i]) { |
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clash = li->overlap_table[loc->offset + i]; |
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break; |
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break; |
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} |
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} |
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} |
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} |
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@@ -221,15 +229,23 @@ static ErrorInfo* check_layout( |
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(clash == &header_sentinel) ? ED_LYT_OVERLAP_HEAD : |
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(clash == &header_sentinel) ? ED_LYT_OVERLAP_HEAD : |
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(clash == &bounds_sentinel) ? ED_LYT_BOUNDS : ED_LYT_OVERLAP); |
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(clash == &bounds_sentinel) ? ED_LYT_BOUNDS : ED_LYT_OVERLAP); |
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if (origin) |
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error_info_append(ei, origin); |
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if (li->origin) |
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error_info_append(ei, li->origin); |
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if (clash != &header_sentinel && clash != &bounds_sentinel) |
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if (clash != &header_sentinel && clash != &bounds_sentinel) |
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error_info_append(ei, clash); |
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error_info_append(ei, clash); |
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return ei; |
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return ei; |
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} |
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} |
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uint8_t bank = (loc->offset + loc->length - 1) / MMU_ROM_BANK_SIZE; |
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if (bank != li->bank && !li->cross_blocks) { |
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ErrorInfo *ei = error_info_create(line, ET_LAYOUT, ED_LYT_BLOCK_CROSS); |
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if (li->origin) |
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error_info_append(ei, li->origin); |
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return ei; |
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} |
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for (size_t i = 0; i < loc->length; i++) |
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for (size_t i = 0; i < loc->length; i++) |
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overlap_table[loc->offset + i] = line; |
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li->overlap_table[loc->offset + i] = line; |
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return NULL; |
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return NULL; |
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} |
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} |
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@@ -242,25 +258,28 @@ static ErrorInfo* check_layout( |
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*/ |
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*/ |
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ErrorInfo* tokenize(AssemblerState *state) |
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ErrorInfo* tokenize(AssemblerState *state) |
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{ |
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{ |
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size_t size = state->rom_size ? state->rom_size : ROM_SIZE_MAX; |
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const ASMLine **overlap_table = calloc(size, sizeof(const ASMLine*)); |
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if (!overlap_table) |
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ASMLayoutInfo li = { |
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.size = state->rom_size ? state->rom_size : ROM_SIZE_MAX, |
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.origin = NULL, .bank = 0, .cross_blocks = state->cross_blocks |
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}; |
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li.overlap_table = calloc(li.size, sizeof(const ASMLine*)); |
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if (!li.overlap_table) |
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OUT_OF_MEMORY() |
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OUT_OF_MEMORY() |
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ErrorInfo *ei = NULL; |
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ErrorInfo *ei = NULL; |
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ASMInstruction dummy_inst = {.next = NULL}, *inst, *prev_inst = &dummy_inst; |
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ASMInstruction dummy_inst = {.next = NULL}, *inst, *prev_inst = &dummy_inst; |
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ASMData dummy_data = {.next = NULL}, *data, *prev_data = &dummy_data; |
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ASMData dummy_data = {.next = NULL}, *data, *prev_data = &dummy_data; |
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const ASMLine *line = state->lines, *origin = NULL; |
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const ASMLine *line = state->lines; |
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size_t offset = 0; |
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size_t offset = 0; |
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ASMSlotInfo si = {.lines = {0}}; |
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ASMSlotInfo si = {.lines = {0}}; |
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for (size_t i = 0; i < HEADER_SIZE; i++) |
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for (size_t i = 0; i < HEADER_SIZE; i++) |
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overlap_table[state->header.offset + i] = &header_sentinel; |
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li.overlap_table[state->header.offset + i] = &header_sentinel; |
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memset(si.slots, -1, MMU_NUM_ROM_BANKS); |
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memset(si.slots, -1, MMU_NUM_ROM_BANKS); |
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while (line) { |
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while (line) { |
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if (line->is_label) { |
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if (line->is_label) { |
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if (offset >= size) { |
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if (offset >= li.size) { |
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ei = error_info_create(line, ET_LAYOUT, ED_LYT_BOUNDS); |
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ei = error_info_create(line, ET_LAYOUT, ED_LYT_BOUNDS); |
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goto cleanup; |
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goto cleanup; |
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} |
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} |
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@@ -272,12 +291,16 @@ ErrorInfo* tokenize(AssemblerState *state) |
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if (IS_DIRECTIVE(line, DIR_ORIGIN)) { |
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if (IS_DIRECTIVE(line, DIR_ORIGIN)) { |
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if ((ei = handle_origin_directive(line, &offset))) |
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if ((ei = handle_origin_directive(line, &offset))) |
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goto cleanup; |
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goto cleanup; |
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origin = line; |
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li.origin = line; |
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li.bank = offset / MMU_ROM_BANK_SIZE; |
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} |
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} |
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else if (IS_DIRECTIVE(line, DIR_BLOCK)) { |
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else if (IS_DIRECTIVE(line, DIR_BLOCK)) { |
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if ((ei = handle_block_directive(line, &offset, &si))) |
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if ((ei = handle_block_directive(line, &offset, &si))) |
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goto cleanup; |
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goto cleanup; |
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origin = line; |
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li.origin = line; |
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li.bank = offset / MMU_ROM_BANK_SIZE; |
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} |
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} |
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else { |
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else { |
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if ((ei = parse_data(line, &data, offset))) |
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if ((ei = parse_data(line, &data, offset))) |
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@@ -287,7 +310,7 @@ ErrorInfo* tokenize(AssemblerState *state) |
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prev_data->next = data; |
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prev_data->next = data; |
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prev_data = data; |
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prev_data = data; |
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if ((ei = check_layout(overlap_table, size, &data->loc, line, origin))) |
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if ((ei = check_layout(&li, &data->loc, line))) |
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goto cleanup; |
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goto cleanup; |
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} |
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} |
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} |
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} |
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@@ -299,7 +322,7 @@ ErrorInfo* tokenize(AssemblerState *state) |
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prev_inst->next = inst; |
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prev_inst->next = inst; |
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prev_inst = inst; |
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prev_inst = inst; |
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if ((ei = check_layout(overlap_table, size, &inst->loc, line, origin))) |
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if ((ei = check_layout(&li, &inst->loc, line))) |
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goto cleanup; |
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goto cleanup; |
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} |
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} |
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line = line->next; |
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line = line->next; |
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@@ -308,6 +331,6 @@ ErrorInfo* tokenize(AssemblerState *state) |
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cleanup: |
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cleanup: |
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state->instructions = dummy_inst.next; |
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state->instructions = dummy_inst.next; |
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state->data = dummy_data.next; |
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state->data = dummy_data.next; |
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free(overlap_table); |
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free(li.overlap_table); |
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return ei; |
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return ei; |
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} |
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} |