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Fix a couple assembler bugs involving obscure instructions.

master
Ben Kurtovic 3 years ago
parent
commit
d6d3b60b3e
3 changed files with 43 additions and 38 deletions
  1. 14
    7
      scripts/update_asm_instructions.py
  2. 14
    16
      src/assembler/instructions.inc.c
  3. 15
    15
      src/assembler/instructions.yml

+ 14
- 7
scripts/update_asm_instructions.py View File

@@ -201,7 +201,7 @@ class Instruction(object):
201 201
             return "INST_INDIRECT({0}).type == AT_IMMEDIATE".format(num)
202 202
 
203 203
         err = "Unknown condition for indirect argument: {0}"
204
-        return ASMInstError(err.format(cond))
204
+        raise ASMInstError(err.format(cond))
205 205
 
206 206
     def _build_indexed_check(self, num, cond):
207 207
         """
@@ -225,7 +225,7 @@ class Instruction(object):
225 225
             return "INST_PORT({0}).type == AT_IMMEDIATE".format(num)
226 226
 
227 227
         err = "Unknown condition for port argument: {0}"
228
-        return ASMInstError(err.format(cond))
228
+        raise ASMInstError(err.format(cond))
229 229
 
230 230
     _SUBCASE_LOOKUP_TABLE = {
231 231
         "register": _build_register_check,
@@ -257,12 +257,14 @@ class Instruction(object):
257 257
                     raise ASMInstError(msg.format(typ, cond))
258 258
                 return merged
259 259
             if typ == "register":
260
-                if cond == "i":
260
+                if cond == "ixy":
261 261
                     return ["ix", "iy"]
262 262
                 if cond == "ih":
263 263
                     return ["ixh", "iyh"]
264 264
                 if cond == "il":
265 265
                     return ["ixl", "iyl"]
266
+            if typ == "indirect" and cond == "reg.ixy":
267
+                return ["reg.ix", "reg.iy"]
266 268
             return [cond]
267 269
 
268 270
         splits = [split(typ, cond) for typ, cond in zip(types, conds)]
@@ -284,6 +286,11 @@ class Instruction(object):
284 286
             index = _rindex(types, "register")
285 287
             return base + self.REGISTER_OFFSETS[conds[index]] * stride
286 288
 
289
+        def handle_index(which):
290
+            prefix = "INST_I{0}_PREFIX".format(which.upper())
291
+            if ret[0] != prefix:
292
+                ret.insert(0, prefix)
293
+
287 294
         ret = ret[:]
288 295
         for i, byte in enumerate(ret):
289 296
             if not isinstance(byte, int):
@@ -344,10 +351,10 @@ class Instruction(object):
344 351
                     raise ASMInstError(msg.format(byte))
345 352
 
346 353
         for i, cond in enumerate(conds):
347
-            if types[i] == "register" and cond[0] == "i":
348
-                prefix = "INST_I{0}_PREFIX".format(cond[1].upper())
349
-                if ret[0] != prefix:
350
-                    ret.insert(0, prefix)
354
+            if types[i] == "register" and cond.startswith(("ix", "iy")):
355
+                handle_index(cond[1])
356
+            elif types[i] == "indirect" and cond in ("reg.ix", "reg.iy"):
357
+                handle_index(cond[5])
351 358
             elif types[i] == "indexed":
352 359
                 ret.insert(0, "INST_INDEX_PREFIX({0})".format(i))
353 360
                 ret.insert(2, "INST_INDEX({0}).offset".format(i))

+ 14
- 16
src/assembler/instructions.inc.c View File

@@ -7,7 +7,7 @@
7 7
     `make` should trigger a rebuild when it is modified; if not, use:
8 8
     `python scripts/update_asm_instructions.py`.
9 9
 
10
-    @AUTOGEN_DATE Fri May 22 01:01:58 2015 UTC
10
+    @AUTOGEN_DATE Fri Apr 29 03:32:10 2016 UTC
11 11
 */
12 12
 
13 13
 /* @AUTOGEN_INST_BLOCK_START */
@@ -607,7 +607,7 @@ INST_FUNC(inir)
607 607
 INST_FUNC(jp)
608 608
 {
609 609
     INST_TAKES_ARGS(
610
-        AT_CONDITION|AT_IMMEDIATE|AT_INDEXED|AT_INDIRECT,
610
+        AT_CONDITION|AT_IMMEDIATE|AT_INDIRECT,
611 611
         AT_IMMEDIATE|AT_OPTIONAL,
612 612
         AT_NONE
613 613
     )
@@ -635,12 +635,14 @@ INST_FUNC(jp)
635 635
             INST_RETURN(3, 0xFA, INST_IMM_U16_B1(INST_IMM(1)), INST_IMM_U16_B2(INST_IMM(1)))
636 636
         INST_ERROR(ARG_VALUE)
637 637
     }
638
-    if (INST_NARGS == 1 && INST_TYPE(0) == AT_INDIRECT &&
639
-            (INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL)) {
640
-        INST_RETURN(1, 0xE9)
641
-    }
642
-    if (INST_NARGS == 1 && INST_TYPE(0) == AT_INDEXED) {
643
-        INST_RETURN(3, INST_INDEX_PREFIX(0), 0xE9, INST_INDEX(0).offset)
638
+    if (INST_NARGS == 1 && INST_TYPE(0) == AT_INDIRECT) {
639
+        if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_HL))
640
+            INST_RETURN(1, 0xE9)
641
+        if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_IX))
642
+            INST_RETURN(2, INST_IX_PREFIX, 0xE9)
643
+        if ((INST_INDIRECT(0).type == AT_REGISTER && INST_INDIRECT(0).addr.reg == REG_IY))
644
+            INST_RETURN(2, INST_IY_PREFIX, 0xE9)
645
+        INST_ERROR(ARG_VALUE)
644 646
     }
645 647
     INST_ERROR(ARG_TYPE)
646 648
 }
@@ -873,14 +875,10 @@ INST_FUNC(ld)
873 875
             INST_RETURN(2, INST_IX_PREFIX, 0x6D)
874 876
         if (INST_REG(0) == REG_IYL && INST_REG(1) == REG_IYL)
875 877
             INST_RETURN(2, INST_IY_PREFIX, 0x6D)
876
-        if (INST_REG(0) == REG_A && INST_REG(1) == REG_IX)
877
-            INST_RETURN(3, INST_IX_PREFIX, 0xED, 0x57)
878
-        if (INST_REG(0) == REG_A && INST_REG(1) == REG_IY)
879
-            INST_RETURN(3, INST_IY_PREFIX, 0xED, 0x57)
880
-        if (INST_REG(0) == REG_IX && INST_REG(1) == REG_A)
881
-            INST_RETURN(3, INST_IX_PREFIX, 0xED, 0x47)
882
-        if (INST_REG(0) == REG_IY && INST_REG(1) == REG_A)
883
-            INST_RETURN(3, INST_IY_PREFIX, 0xED, 0x47)
878
+        if (INST_REG(0) == REG_A && INST_REG(1) == REG_I)
879
+            INST_RETURN(2, 0xED, 0x57)
880
+        if (INST_REG(0) == REG_I && INST_REG(1) == REG_A)
881
+            INST_RETURN(2, 0xED, 0x47)
884 882
         if (INST_REG(0) == REG_A && INST_REG(1) == REG_R)
885 883
             INST_RETURN(2, 0xED, 0x5F)
886 884
         if (INST_REG(0) == REG_R && INST_REG(1) == REG_A)

+ 15
- 15
src/assembler/instructions.yml View File

@@ -35,13 +35,13 @@ add:
35 35
           cases:
36 36
             - if:     [a, a|b|c|d|e|h|ih|l|il]
37 37
               return: [reg(0x80)]
38
-            - if:     [hl|i, bc]
38
+            - if:     [hl|ixy, bc]
39 39
               return: [0x09]
40
-            - if:     [hl|i, de]
40
+            - if:     [hl|ixy, de]
41 41
               return: [0x19]
42
-            - if:     [hl|i, hl|i]
42
+            - if:     [hl|ixy, hl|ixy]
43 43
               return: [0x29]
44
-            - if:     [hl|i, sp]
44
+            - if:     [hl|ixy, sp]
45 45
               return: [0x39]
46 46
         - type: [register, immediate]
47 47
           cases:
@@ -143,7 +143,7 @@ dec:
143 143
           cases:
144 144
             - if:     [a|b|c|d|e|h|ih|l|il]
145 145
               return: [reg(0x05 0x08)]
146
-            - if:     [bc|de|hl|i|sp]
146
+            - if:     [bc|de|hl|ixy|sp]
147 147
               return: [reg(0x0B 0x10)]
148 148
         - type: [indirect_hl_or_indexed]
149 149
           cases:
@@ -177,7 +177,7 @@ ex:
177 177
               return: [0xEB]
178 178
         - type: [indirect, register]
179 179
           cases:
180
-            - if:     [reg.sp, hl|i]
180
+            - if:     [reg.sp, hl|ixy]
181 181
               return: [0xE3]
182 182
 
183 183
 exx:
@@ -221,7 +221,7 @@ inc:
221 221
           cases:
222 222
             - if:     [a|b|c|d|e|h|ih|l|il]
223 223
               return: [reg(0x04 0x08)]
224
-            - if:     [bc|de|hl|i|sp]
224
+            - if:     [bc|de|hl|ixy|sp]
225 225
               return: [reg(0x03 0x10)]
226 226
         - type: [indirect_hl_or_indexed]
227 227
           cases:
@@ -255,9 +255,9 @@ jp:
255 255
           cases:
256 256
             - if:     [nz|z|nc|c|po|pe|p|m, u16]
257 257
               return: [cond(0xC2 0x08), u16]
258
-        - type: [indirect_hl_or_indexed]
258
+        - type: [indirect]
259 259
           cases:
260
-            - if:     [_]
260
+            - if:     [reg.hl|reg.ixy]
261 261
               return: [0xE9]
262 262
 
263 263
 jr:
@@ -323,13 +323,13 @@ ld:
323 323
               return: [0xED, 0x5F]
324 324
             - if:     [r, a]
325 325
               return: [0xED, 0x4F]
326
-            - if:     [sp, hl|i]
326
+            - if:     [sp, hl|ixy]
327 327
               return: [0xF9]
328 328
         - type: [register, immediate]
329 329
           cases:
330 330
             - if:     [a|b|c|d|e|h|ih|l|il, u8]
331 331
               return: [reg(0x06 0x08), u8]
332
-            - if:     [bc|de|hl|i|sp, u16]
332
+            - if:     [bc|de|hl|ixy|sp, u16]
333 333
               return: [reg(0x01 0x10), u16]
334 334
         - type: [register, indirect_hl_or_indexed]
335 335
           cases:
@@ -341,7 +341,7 @@ ld:
341 341
               return: [0x0A]
342 342
             - if:     [a, reg.de]
343 343
               return: [0x1A]
344
-            - if:     [hl|i, imm]
344
+            - if:     [hl|ixy, imm]
345 345
               return: [0x2A, u16]
346 346
             - if:     [a, imm]
347 347
               return: [0x3A, u16]
@@ -361,7 +361,7 @@ ld:
361 361
               return: [0x02]
362 362
             - if:     [reg.de, a]
363 363
               return: [0x12]
364
-            - if:     [imm, hl|i]
364
+            - if:     [imm, hl|ixy]
365 365
               return: [0x22, u16]
366 366
             - if:     [imm, a]
367 367
               return: [0x32, u16]
@@ -443,7 +443,7 @@ pop:
443 443
     cases:
444 444
         - type: [register]
445 445
           cases:
446
-            - if:     [bc|de|hl|i|af]
446
+            - if:     [bc|de|hl|ixy|af]
447 447
               return: [reg(0xC1 0x10)]
448 448
 
449 449
 push:
@@ -451,7 +451,7 @@ push:
451 451
     cases:
452 452
         - type: [register]
453 453
           cases:
454
-            - if:     [bc|de|hl|i|af]
454
+            - if:     [bc|de|hl|ixy|af]
455 455
               return: [reg(0xC5 0x10)]
456 456
 
457 457
 res:

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