An emulator, assembler, and disassembler for the Sega Game Gear
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  1. /* Copyright (C) 2014-2016 Ben Kurtovic <ben.kurtovic@gmail.com>
  2. Released under the terms of the MIT License. See LICENSE for details. */
  3. #include "z80.h"
  4. #include "disassembler.h"
  5. #include "logging.h"
  6. #include "util.h"
  7. #define FLAG_CARRY 0
  8. #define FLAG_SUBTRACT 1
  9. #define FLAG_PARITY 2
  10. #define FLAG_OVERFLOW 2
  11. #define FLAG_UNDOC_3 3
  12. #define FLAG_HALFCARRY 4
  13. #define FLAG_UNDOC_5 5
  14. #define FLAG_ZERO 6
  15. #define FLAG_SIGN 7
  16. /*
  17. Initialize a Z80 object.
  18. Register values are invalid until z80_power() is called. No other Z80
  19. functions should be called before it.
  20. */
  21. void z80_init(Z80 *z80, MMU *mmu, IO *io)
  22. {
  23. z80->mmu = mmu;
  24. z80->io = io;
  25. z80->except = true;
  26. z80->exc_code = Z80_EXC_NOT_POWERED;
  27. z80->exc_data = 0;
  28. }
  29. /*
  30. Power on the Z80, setting registers to their default values.
  31. This also clears the exception flag, which is necessary before the Z80 can
  32. begin emulation.
  33. */
  34. void z80_power(Z80 *z80)
  35. {
  36. z80->regs.af = 0xFFFF;
  37. z80->regs.bc = 0xFFFF;
  38. z80->regs.de = 0xFFFF;
  39. z80->regs.hl = 0xFFFF;
  40. z80->regs.af_ = 0xFFFF;
  41. z80->regs.bc_ = 0xFFFF;
  42. z80->regs.de_ = 0xFFFF;
  43. z80->regs.hl_ = 0xFFFF;
  44. z80->regs.ix = 0xFFFF;
  45. z80->regs.iy = 0xFFFF;
  46. z80->regs.sp = 0xFFF0;
  47. z80->regs.pc = 0x0000;
  48. z80->regs.i = 0xFF;
  49. z80->regs.r = 0xFF;
  50. z80->regs.im_a = z80->regs.im_b = 0;
  51. z80->regs.iff1 = z80->regs.iff2 = 0;
  52. z80->regs.ixy = NULL;
  53. z80->regs.ih = z80->regs.il = NULL;
  54. z80->except = false;
  55. z80->pending_cycles = 0;
  56. z80->irq_wait = false;
  57. z80->trace.fresh = true;
  58. z80->trace.last_addr = 0;
  59. z80->trace.counter = 0;
  60. }
  61. /*
  62. Return whether a particular flag is set in the F register.
  63. */
  64. static inline bool get_flag(const Z80 *z80, uint8_t flag)
  65. {
  66. return z80->regs.f & (1 << flag);
  67. }
  68. /*
  69. Return whether a particular flag is set in the F' register.
  70. */
  71. static inline bool get_shadow_flag(const Z80 *z80, uint8_t flag)
  72. {
  73. return z80->regs.f_ & (1 << flag);
  74. }
  75. /*
  76. Update the F register flags according to the set bits in the mask.
  77. */
  78. static inline void set_flags(Z80 *z80,
  79. bool c, bool n, bool pv, bool f3, bool h, bool f5, bool z, bool s,
  80. uint8_t mask)
  81. {
  82. uint8_t new = (
  83. c << FLAG_CARRY |
  84. n << FLAG_SUBTRACT |
  85. pv << FLAG_PARITY |
  86. f3 << FLAG_UNDOC_3 |
  87. h << FLAG_HALFCARRY |
  88. f5 << FLAG_UNDOC_5 |
  89. z << FLAG_ZERO |
  90. s << FLAG_SIGN
  91. );
  92. z80->regs.f = (~mask & z80->regs.f) | (mask & new);
  93. }
  94. #include "z80_flags.inc.c"
  95. /*
  96. Push a two-byte value onto the stack.
  97. */
  98. static inline void stack_push(Z80 *z80, uint16_t value)
  99. {
  100. z80->regs.sp -= 2;
  101. mmu_write_double(z80->mmu, z80->regs.sp, value);
  102. }
  103. /*
  104. Pop a two-byte value from the stack.
  105. */
  106. static inline uint16_t stack_pop(Z80 *z80)
  107. {
  108. uint16_t value = mmu_read_double(z80->mmu, z80->regs.sp);
  109. z80->regs.sp += 2;
  110. return value;
  111. }
  112. /*
  113. Extract an 8-bit register from the given opcode and return a pointer to it.
  114. */
  115. static inline uint8_t* extract_reg(Z80 *z80, uint8_t opcode)
  116. {
  117. switch (opcode & 0x38) {
  118. case 0x00: return &z80->regs.b;
  119. case 0x08: return &z80->regs.c;
  120. case 0x10: return &z80->regs.d;
  121. case 0x18: return &z80->regs.e;
  122. case 0x20: return &z80->regs.h;
  123. case 0x28: return &z80->regs.l;
  124. case 0x38: return &z80->regs.a;
  125. }
  126. FATAL("invalid call: extract_reg(z80, 0x%02X)", opcode)
  127. }
  128. /*
  129. Extract a ss/dd register pair from the given opcode and return a pointer.
  130. */
  131. static inline uint16_t* extract_pair(Z80 *z80, uint8_t opcode)
  132. {
  133. switch (opcode & 0x30) {
  134. case 0x00: return &z80->regs.bc;
  135. case 0x10: return &z80->regs.de;
  136. case 0x20: return &z80->regs.hl;
  137. case 0x30: return &z80->regs.sp;
  138. }
  139. FATAL("invalid call: extract_pair(z80, 0x%02X)", opcode)
  140. }
  141. /*
  142. Extract a pp register pair from the given opcode and return a pointer.
  143. */
  144. static inline uint16_t* extract_pair_pp(Z80 *z80, uint8_t opcode)
  145. {
  146. switch (opcode & 0x30) {
  147. case 0x00: return &z80->regs.bc;
  148. case 0x10: return &z80->regs.de;
  149. case 0x20: return z80->regs.ixy;
  150. case 0x30: return &z80->regs.sp;
  151. }
  152. FATAL("invalid call: extract_pair_pp(z80, 0x%02X)", opcode)
  153. }
  154. /*
  155. Extract a qq register pair from the given opcode and return a pointer.
  156. */
  157. static inline uint16_t* extract_pair_qq(Z80 *z80, uint8_t opcode)
  158. {
  159. switch (opcode & 0x30) {
  160. case 0x00: return &z80->regs.bc;
  161. case 0x10: return &z80->regs.de;
  162. case 0x20: return &z80->regs.hl;
  163. case 0x30: return &z80->regs.af;
  164. }
  165. FATAL("invalid call: extract_pair_qq(z80, 0x%02X)", opcode)
  166. }
  167. /*
  168. Extract a condition from the given opcode.
  169. */
  170. static inline bool extract_cond(const Z80 *z80, uint8_t opcode)
  171. {
  172. switch (opcode & 0x38) {
  173. case 0x00: return !get_flag(z80, FLAG_ZERO);
  174. case 0x08: return get_flag(z80, FLAG_ZERO);
  175. case 0x10: return !get_flag(z80, FLAG_CARRY);
  176. case 0x18: return get_flag(z80, FLAG_CARRY);
  177. case 0x20: return !get_flag(z80, FLAG_PARITY);
  178. case 0x28: return get_flag(z80, FLAG_PARITY);
  179. case 0x30: return !get_flag(z80, FLAG_SIGN);
  180. case 0x38: return get_flag(z80, FLAG_SIGN);
  181. }
  182. FATAL("invalid call: extract_cond(z80, 0x%02X)", opcode)
  183. }
  184. /*
  185. Return the address signified by a indirect index instruction.
  186. */
  187. static inline uint16_t get_index_addr(Z80 *z80, uint16_t offset_addr)
  188. {
  189. return *z80->regs.ixy + ((int8_t) mmu_read_byte(z80->mmu, offset_addr));
  190. }
  191. /*
  192. Return the CPU's current interrupt mode.
  193. */
  194. static inline uint8_t get_interrupt_mode(const Z80 *z80)
  195. {
  196. if (!z80->regs.im_a)
  197. return 0;
  198. if (!z80->regs.im_b)
  199. return 1;
  200. return 2;
  201. }
  202. /*
  203. Handle an active IRQ line. Return the number of cycles consumed.
  204. */
  205. static inline uint8_t accept_interrupt(Z80 *z80)
  206. {
  207. TRACE("Z80 triggering mode-%d interrupt", get_interrupt_mode(z80))
  208. z80->regs.iff1 = z80->regs.iff2 = 0;
  209. stack_push(z80, z80->regs.pc);
  210. if (get_interrupt_mode(z80) < 2) {
  211. z80->regs.pc = 0x0038;
  212. return 13;
  213. } else {
  214. uint16_t addr = (z80->regs.i << 8) + 0xFF;
  215. z80->regs.pc = mmu_read_double(z80->mmu, addr);
  216. return 19;
  217. }
  218. }
  219. /*
  220. Increment the refresh counter register, R.
  221. */
  222. static inline void increment_refresh_counter(Z80 *z80)
  223. {
  224. z80->regs.r = (z80->regs.r & 0x80) | ((z80->regs.r + 1) & 0x7F);
  225. }
  226. #include "z80_ops.inc.c"
  227. /*
  228. @TRACE_LEVEL
  229. Trace the instruction about to be executed by the CPU.
  230. */
  231. static inline void trace_instruction(Z80 *z80)
  232. {
  233. if (z80->regs.pc == z80->trace.last_addr && !z80->trace.fresh) {
  234. z80->trace.counter++;
  235. if (!(z80->trace.counter % (1 << 14)))
  236. TRACE_NOEOL("repeat last: %llu times\r", z80->trace.counter);
  237. return;
  238. }
  239. if (z80->trace.fresh) {
  240. TRACE("PC ADDR P1 P2 OP A1 A2 INSTR\tARGS")
  241. TRACE("------- -------------- -----\t----")
  242. z80->trace.fresh = false;
  243. }
  244. z80->trace.last_addr = z80->regs.pc;
  245. z80->trace.counter = 0;
  246. uint32_t quad = mmu_read_quad(z80->mmu, z80->regs.pc);
  247. uint8_t bytes[4] = {quad, quad >> 8, quad >> 16, quad >> 24};
  248. DisasInstr *instr = disassemble_instruction(bytes);
  249. TRACE("0x%04X: %-14s %s",
  250. z80->regs.pc, instr->bytestr, instr->line)
  251. disas_instr_free(instr);
  252. }
  253. /*
  254. Emulate the given number of cycles of the Z80, or until an exception.
  255. The return value indicates whether the exception flag is set. If it is,
  256. then emulation must be stopped because further calls to z80_do_cycles()
  257. will have no effect. The exception flag can be reset with z80_power().
  258. */
  259. bool z80_do_cycles(Z80 *z80, double cycles)
  260. {
  261. cycles += z80->pending_cycles;
  262. while (cycles > 0 && !z80->except) {
  263. if (io_check_irq(z80->io) && z80->regs.iff1 && !z80->irq_wait) {
  264. cycles -= accept_interrupt(z80);
  265. continue;
  266. }
  267. if (z80->irq_wait)
  268. z80->irq_wait = false;
  269. uint8_t opcode = mmu_read_byte(z80->mmu, z80->regs.pc);
  270. increment_refresh_counter(z80);
  271. if (TRACE_LEVEL)
  272. trace_instruction(z80);
  273. cycles -= (*instruction_table[opcode])(z80, opcode);
  274. }
  275. z80->pending_cycles = cycles;
  276. return z80->except;
  277. }
  278. /*
  279. @DEBUG_LEVEL
  280. Print out all register values to stdout.
  281. */
  282. void z80_dump_registers(const Z80 *z80)
  283. {
  284. const Z80RegFile *rf = &z80->regs;
  285. DEBUG("Dumping Z80 register values:")
  286. DEBUG("- AF: 0x%04X (%03d, %03d)", rf->af, rf->a, rf->f)
  287. DEBUG("- BC: 0x%04X (%03d, %03d)", rf->bc, rf->b, rf->c)
  288. DEBUG("- DE: 0x%04X (%03d, %03d)", rf->de, rf->d, rf->e)
  289. DEBUG("- HL: 0x%04X (%03d, %03d)", rf->hl, rf->h, rf->l)
  290. DEBUG("- AF': 0x%04X (%03d, %03d)", rf->af_, rf->a_, rf->f_)
  291. DEBUG("- BC': 0x%04X (%03d, %03d)", rf->bc_, rf->b_, rf->c_)
  292. DEBUG("- DE': 0x%04X (%03d, %03d)", rf->de_, rf->d_, rf->e_)
  293. DEBUG("- HL': 0x%04X (%03d, %03d)", rf->hl_, rf->h_, rf->l_)
  294. DEBUG("- IX: 0x%04X (%05d)", rf->ix, rf->ix)
  295. DEBUG("- IY: 0x%04X (%05d)", rf->iy, rf->iy)
  296. DEBUG("- SP: 0x%04X (%05d)", rf->sp, rf->sp)
  297. DEBUG("- PC: 0x%04X (%05d)", rf->pc, rf->pc)
  298. DEBUG("- I: 0x%2X (%03d)", rf->i, rf->i)
  299. DEBUG("- R: 0x%2X (%03d)", rf->r, rf->r)
  300. DEBUG("- F: "BINARY_FMT" (C: %u, N: %u, P/V: %u, H: %u, Z: %u, S: %u)",
  301. BINARY_VAL(rf->f),
  302. get_flag(z80, FLAG_CARRY),
  303. get_flag(z80, FLAG_SUBTRACT),
  304. get_flag(z80, FLAG_PARITY),
  305. get_flag(z80, FLAG_HALFCARRY),
  306. get_flag(z80, FLAG_ZERO),
  307. get_flag(z80, FLAG_SIGN))
  308. DEBUG("- F': "BINARY_FMT" (C: %u, N: %u, P/V: %u, H: %u, Z: %u, S: %u)",
  309. BINARY_VAL(rf->f_),
  310. get_shadow_flag(z80, FLAG_CARRY),
  311. get_shadow_flag(z80, FLAG_SUBTRACT),
  312. get_shadow_flag(z80, FLAG_PARITY),
  313. get_shadow_flag(z80, FLAG_HALFCARRY),
  314. get_shadow_flag(z80, FLAG_ZERO),
  315. get_shadow_flag(z80, FLAG_SIGN))
  316. DEBUG("- IM: 0b%u%u (mode: %u)", rf->im_a, rf->im_b,
  317. get_interrupt_mode(z80))
  318. DEBUG("- IFF: 1: %u, 2: %u", rf->iff1, rf->iff2)
  319. }