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An emulator, assembler, and disassembler for the Sega Game Gear
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crater/src/z80_ops.inc.c

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  1. /* Copyright (C) 2014-2016 Ben Kurtovic <ben.kurtovic@gmail.com>

  2.    Released under the terms of the MIT License. See LICENSE for details. */

  3. 

  4. /*

  5.     This file contains code to implement the Z80 instruction set. Since there

  6.     are a lot of functions, it is kept separate from the main z80.c file. It is

  7.     included in the middle of z80.c and should not be compiled separately.

  8. 

  9.     Most of this information can be found in the Z80 User Manual, Revision 06.

  10. 

  11.     Undocumented opcodes, flags, and some additional details come from:

  12.     - http://clrhome.org/table/

  13.     - http://www.z80.info/z80sflag.htm

  14. */

  15. 

  16. typedef uint8_t (*DispatchTable[256])(Z80*, uint8_t);

  17. 

  18. static DispatchTable instruction_table;

  19. static DispatchTable instruction_table_extended;

  20. static DispatchTable instruction_table_bits;

  21. static DispatchTable instruction_table_index;

  22. static DispatchTable instruction_table_index_bits;

  23. 

  24. /*

  25.     Unimplemented opcode handler.

  26. */

  27. static uint8_t z80_inst_unimplemented(Z80 *z80, uint8_t opcode)

  28. {

  29.     z80->except = true;

  30.     z80->exc_code = Z80_EXC_UNIMPLEMENTED_OPCODE;

  31.     z80->exc_data = opcode;

  32.     return 4;

  33. }

  34. 

  35. /*

  36.     LD r, r' (0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x47, 0x48, 0x49, 0x4A, 0x4B,

  37.         0x4C, 0x4D, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x57, 0x58, 0x59,

  38.         0x5A, 0x5B, 0x5C, 0x5D, 0x5F, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x67,

  39.         0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6F, 0x78, 0x79, 0x7A, 0x7B, 0x7C,

  40.         0x7D, 0x7F):

  41.     Load r' (8-bit register) into r (8-bit register).

  42. */

  43. static uint8_t z80_inst_ld_r_r(Z80 *z80, uint8_t opcode)

  44. {

  45.     uint8_t *dst = extract_reg(z80, opcode),

  46.             *src = extract_reg(z80, opcode << 3);

  47.     *dst = *src;

  48.     z80->regs.pc++;

  49.     return 4;

  50. }

  51. 

  52. /*

  53.     LD r, n (0x06, 0x0E, 0x16, 0x1E, 0x26, 0x2E, 0x3E):

  54.     Load n (8-bit immediate) into r (8-bit register).

  55. */

  56. static uint8_t z80_inst_ld_r_n(Z80 *z80, uint8_t opcode)

  57. {

  58.     uint8_t *reg = extract_reg(z80, opcode);

  59.     *reg = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  60.     z80->regs.pc++;

  61.     return 7;

  62. }

  63. 

  64. /*

  65.     LD r, (HL) (0x46, 0x4E, 0x56, 0x5E, 0x66, 0x6E, 0x7E):

  66.     Load the memory pointed to by HL into r (8-bit register).

  67. */

  68. static uint8_t z80_inst_ld_r_hl(Z80 *z80, uint8_t opcode)

  69. {

  70.     uint8_t *reg = extract_reg(z80, opcode);

  71.     *reg = mmu_read_byte(z80->mmu, z80->regs.hl);

  72.     z80->regs.pc++;

  73.     return 7;

  74. }

  75. 

  76. /*

  77.     LD r, (IXY+d) (0xDD46, 0xDD4E, 0xDD56, 0xDD5E, 0xDD66, 0xDD6E, 0xDD7E,

  78.                    0xFD46, 0xFD4E, 0xFD56, 0xFD5E, 0xFD66, 0xFD6E, 0xFD7E):

  79.     Load (IX+d) or (IY+d) into r (8-bit register).

  80. */

  81. static uint8_t z80_inst_ld_r_ixy(Z80 *z80, uint8_t opcode)

  82. {

  83.     uint8_t *reg = extract_reg(z80, opcode);

  84.     uint16_t addr = get_index_addr(z80, ++z80->regs.pc);

  85.     *reg = mmu_read_byte(z80->mmu, addr);

  86.     z80->regs.pc++;

  87.     return 19;

  88. }

  89. 

  90. /*

  91.     LD (HL), r (0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x77):

  92.     Load r (8-bit register) into the memory pointed to by HL.

  93. */

  94. static uint8_t z80_inst_ld_hl_r(Z80 *z80, uint8_t opcode)

  95. {

  96.     uint8_t *reg = extract_reg(z80, opcode << 3);

  97.     mmu_write_byte(z80->mmu, z80->regs.hl, *reg);

  98.     z80->regs.pc++;

  99.     return 7;

  100. }

  101. 

  102. /*

  103.     LD (IXY+d), r (0xDD70, 0xDD71, 0xDD72, 0xDD73, 0xDD74, 0xDD75, 0xDD77,

  104.                    0xFD70, 0xFD71, 0xFD72, 0xFD73, 0xFD74, 0xFD75, 0xFD77):

  105.     Load r (8-bit register) into (IX+d) or (IY+d).

  106. */

  107. static uint8_t z80_inst_ld_ixy_r(Z80 *z80, uint8_t opcode)

  108. {

  109.     uint8_t *reg = extract_reg(z80, opcode << 3);

  110.     uint16_t addr = get_index_addr(z80, ++z80->regs.pc);

  111.     mmu_write_byte(z80->mmu, addr, *reg);

  112.     z80->regs.pc++;

  113.     return 19;

  114. }

  115. 

  116. /*

  117.     LD (HL), n (0x36):

  118.     Load n (8-bit immediate) into the memory address pointed to by HL.

  119. */

  120. static uint8_t z80_inst_ld_hl_n(Z80 *z80, uint8_t opcode)

  121. {

  122.     (void) opcode;

  123.     uint8_t byte = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  124.     mmu_write_byte(z80->mmu, z80->regs.hl, byte);

  125.     z80->regs.pc++;

  126.     return 10;

  127. }

  128. 

  129. /*

  130.     LD (IXY+d), n (0xDD36, 0xFD36):

  131.     Load n (8-bit immediate) into (IX+d) or (IY+d).

  132. */

  133. static uint8_t z80_inst_ld_ixy_n(Z80 *z80, uint8_t opcode)

  134. {

  135.     (void) opcode;

  136.     uint16_t addr = get_index_addr(z80, ++z80->regs.pc);

  137.     uint8_t byte = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  138.     mmu_write_byte(z80->mmu, addr, byte);

  139.     z80->regs.pc++;

  140.     return 19;

  141. }

  142. 

  143. /*

  144.     LD A, (BC/DE) (0x0A, 0x1A):

  145.     Load the memory pointed to BC or DE into A.

  146. */

  147. static uint8_t z80_inst_ld_a_bcde(Z80 *z80, uint8_t opcode)

  148. {

  149.     uint16_t addr = *extract_pair(z80, opcode);

  150.     z80->regs.a = mmu_read_byte(z80->mmu, addr);

  151.     z80->regs.pc++;

  152.     return 7;

  153. }

  154. 

  155. /*

  156.     LD A, (nn) (0x3A):

  157.     Load memory at address nn into A.

  158. */

  159. static uint8_t z80_inst_ld_a_nn(Z80 *z80, uint8_t opcode)

  160. {

  161.     (void) opcode;

  162.     uint16_t addr = mmu_read_double(z80->mmu, ++z80->regs.pc);

  163.     z80->regs.a = mmu_read_byte(z80->mmu, addr);

  164.     z80->regs.pc += 2;

  165.     return 13;

  166. }

  167. 

  168. /*

  169.     LD (BC/DE), A (0x02, 0x12):

  170.     Load A into the memory address pointed to by BC or DE.

  171. */

  172. static uint8_t z80_inst_ld_bcde_a(Z80 *z80, uint8_t opcode)

  173. {

  174.     uint16_t addr = *extract_pair(z80, opcode);

  175.     mmu_write_byte(z80->mmu, addr, z80->regs.a);

  176.     z80->regs.pc++;

  177.     return 7;

  178. }

  179. 

  180. /*

  181.     LD (nn), A (0x32):

  182.     Load A into memory address nn.

  183. */

  184. static uint8_t z80_inst_ld_nn_a(Z80 *z80, uint8_t opcode)

  185. {

  186.     (void) opcode;

  187.     uint16_t addr = mmu_read_double(z80->mmu, ++z80->regs.pc);

  188.     mmu_write_byte(z80->mmu, addr, z80->regs.a);

  189.     z80->regs.pc += 2;

  190.     return 13;

  191. }

  192. 

  193. /*

  194.     LD A, I (0xED57):

  195.     Load I into A.

  196.     TODO

  197. */

  198. // static uint8_t z80_inst_ld_a_i(Z80 *z80, uint8_t opcode)

  199. 

  200. /*

  201.     LD A, R (0xED5F):

  202.     Load R into A.

  203.     TODO

  204. */

  205. // static uint8_t z80_inst_ld_a_r(Z80 *z80, uint8_t opcode)

  206. 

  207. /*

  208.     LD I, A (0xED47):

  209.     Load A into I.

  210. */

  211. static uint8_t z80_inst_ld_i_a(Z80 *z80, uint8_t opcode)

  212. {

  213.     (void) opcode;

  214.     z80->regs.i = z80->regs.a;

  215.     z80->regs.pc++;

  216.     return 9;

  217. }

  218. 

  219. /*

  220.     LD R, A (0xED4F):

  221.     Load A into R.

  222. */

  223. static uint8_t z80_inst_ld_r_a(Z80 *z80, uint8_t opcode)

  224. {

  225.     (void) opcode;

  226.     z80->regs.r = z80->regs.a;

  227.     z80->regs.pc++;

  228.     return 9;

  229. }

  230. 

  231. /*

  232.     LD dd, nn (0x01, 0x11, 0x21, 0x31):

  233.     Load nn (16-bit immediate) into dd (16-bit register).

  234. */

  235. static uint8_t z80_inst_ld_dd_nn(Z80 *z80, uint8_t opcode)

  236. {

  237.     *extract_pair(z80, opcode) = mmu_read_double(z80->mmu, ++z80->regs.pc);

  238.     z80->regs.pc += 2;

  239.     return 10;

  240. }

  241. 

  242. /*

  243.     LD IXY, nn (0xDD21, 0xFD21):

  244.     Load nn (16-bit immediate) into IX or IY.

  245. */

  246. static uint8_t z80_inst_ld_ixy_nn(Z80 *z80, uint8_t opcode)

  247. {

  248.     (void) opcode;

  249.     *z80->last_index = mmu_read_double(z80->mmu, ++z80->regs.pc);

  250.     z80->regs.pc += 2;

  251.     return 14;

  252. }

  253. 

  254. /*

  255.     LD HL, (nn) (0x2A):

  256.     Load memory at address nn into HL.

  257. */

  258. static uint8_t z80_inst_ld_hl_inn(Z80 *z80, uint8_t opcode)

  259. {

  260.     (void) opcode;

  261.     uint16_t addr = mmu_read_double(z80->mmu, ++z80->regs.pc);

  262.     z80->regs.hl = mmu_read_double(z80->mmu, addr);

  263.     z80->regs.pc += 2;

  264.     return 16;

  265. }

  266. 

  267. /*

  268.     LD dd, (nn) (0xED4B, 0xED5B, 0xED6B, 0xED7B):

  269.     Load memory at address nn into dd (16-bit register).

  270. */

  271. static uint8_t z80_inst_ld_dd_inn(Z80 *z80, uint8_t opcode)

  272. {

  273.     uint16_t addr = mmu_read_double(z80->mmu, ++z80->regs.pc);

  274.     *extract_pair(z80, opcode) = mmu_read_double(z80->mmu, addr);

  275.     z80->regs.pc += 2;

  276.     return 20;

  277. }

  278. 

  279. /*

  280.     LD IXY, (nn) (0xDD2A, 0xFD2A):

  281.     Load memory at address nn into IX or IY.

  282. */

  283. static uint8_t z80_inst_ld_ixy_inn(Z80 *z80, uint8_t opcode)

  284. {

  285.     (void) opcode;

  286.     uint16_t addr = mmu_read_double(z80->mmu, ++z80->regs.pc);

  287.     *z80->last_index = mmu_read_double(z80->mmu, addr);

  288.     z80->regs.pc += 2;

  289.     return 20;

  290. }

  291. 

  292. /*

  293.     LD (nn), HL: (0x22):

  294.     Load HL into memory address nn.

  295. */

  296. static uint8_t z80_inst_ld_inn_hl(Z80 *z80, uint8_t opcode)

  297. {

  298.     (void) opcode;

  299.     uint16_t addr = mmu_read_double(z80->mmu, ++z80->regs.pc);

  300.     mmu_write_double(z80->mmu, addr, z80->regs.hl);

  301.     z80->regs.pc += 2;

  302.     return 16;

  303. }

  304. 

  305. /*

  306.     LD (nn), dd (0xED43, 0xED53, 0xED63, 0xED73);

  307.     Load dd (16-bit register) into memory address nn.

  308. */

  309. static uint8_t z80_inst_ld_inn_dd(Z80 *z80, uint8_t opcode)

  310. {

  311.     uint16_t addr = mmu_read_double(z80->mmu, ++z80->regs.pc);

  312.     mmu_write_double(z80->mmu, addr, *extract_pair(z80, opcode));

  313.     z80->regs.pc += 2;

  314.     return 16;

  315. }

  316. 

  317. /*

  318.     LD (nn), IXY (0xDD22, 0xFD22):

  319.     Load IX or IY into memory address nn.

  320. */

  321. static uint8_t z80_inst_ld_inn_ixy(Z80 *z80, uint8_t opcode)

  322. {

  323.     (void) opcode;

  324.     uint16_t addr = mmu_read_double(z80->mmu, ++z80->regs.pc);

  325.     mmu_write_double(z80->mmu, addr, *z80->last_index);

  326.     z80->regs.pc += 2;

  327.     return 20;

  328. }

  329. 

  330. /*

  331.     LD SP, HL (0xF9):

  332.     Load HL into SP.

  333. */

  334. static uint8_t z80_inst_ld_sp_hl(Z80 *z80, uint8_t opcode)

  335. {

  336.     (void) opcode;

  337.     z80->regs.sp = z80->regs.hl;

  338.     return 6;

  339. }

  340. 

  341. /*

  342.     LD SP, IXY (0xDDF9, 0xFDF9):

  343.     Load IX or IY into SP.

  344. */

  345. static uint8_t z80_inst_ld_sp_ixy(Z80 *z80, uint8_t opcode)

  346. {

  347.     (void) opcode;

  348.     *z80->last_index = z80->regs.hl;

  349.     return 10;

  350. }

  351. 

  352. /*

  353.     PUSH qq (0xC5, 0xD5, 0xE5, 0xF5):

  354.     Push qq onto the stack, and decrement SP by two.

  355. */

  356. static uint8_t z80_inst_push_qq(Z80 *z80, uint8_t opcode)

  357. {

  358.     stack_push(z80, *extract_pair(z80, opcode));

  359.     z80->regs.pc++;

  360.     return 11;

  361. }

  362. 

  363. /*

  364.     PUSH IXY (0xDDE5, 0xFDE5):

  365.     Push IX or IY onto the stack, and decrement SP by two.

  366. */

  367. static uint8_t z80_inst_push_ixy(Z80 *z80, uint8_t opcode)

  368. {

  369.     (void) opcode;

  370.     stack_push(z80, *z80->last_index);

  371.     z80->regs.pc++;

  372.     return 15;

  373. }

  374. 

  375. /*

  376.     POP qq (0xC1, 0xD1, 0xE1, 0xF1):

  377.     Pop qq from the stack, and increment SP by two.

  378. */

  379. static uint8_t z80_inst_pop_qq(Z80 *z80, uint8_t opcode)

  380. {

  381.     *extract_pair(z80, opcode) = stack_pop(z80);

  382.     z80->regs.pc++;

  383.     return 10;

  384. }

  385. 

  386. /*

  387.     POP IXY (0xDDE1, 0xFDE1):

  388.     Pop IX or IY from the stack, and increment SP by two.

  389. */

  390. static uint8_t z80_inst_pop_ixy(Z80 *z80, uint8_t opcode)

  391. {

  392.     (void) opcode;

  393.     *z80->last_index = stack_pop(z80);

  394.     z80->regs.pc++;

  395.     return 14;

  396. }

  397. 

  398. /*

  399.     EX DE, HL (0xEB):

  400.     Exchange DE with HL.

  401. */

  402. static uint8_t z80_inst_ex_de_hl(Z80 *z80, uint8_t opcode)

  403. {

  404.     (void) opcode;

  405.     uint16_t temp = z80->regs.de;

  406.     z80->regs.de = z80->regs.hl;

  407.     z80->regs.hl = temp;

  408.     z80->regs.pc++;

  409.     return 4;

  410. }

  411. 

  412. /*

  413.     EX AF, AF' (0x08):

  414.     Exchange AF with AF'.

  415. */

  416. static uint8_t z80_inst_ex_af_af(Z80 *z80, uint8_t opcode)

  417. {

  418.     (void) opcode;

  419.     uint16_t temp = z80->regs.af;

  420.     z80->regs.af = z80->regs.af_;

  421.     z80->regs.af_ = temp;

  422.     z80->regs.pc++;

  423.     return 4;

  424. }

  425. 

  426. /*

  427.     EXX (0xD9):

  428.     Exchange the 16-bit registers with their shadows

  429.     (BC <=> BC', DE <=> DE', HL <=> HL').

  430. */

  431. static uint8_t z80_inst_exx(Z80 *z80, uint8_t opcode)

  432. {

  433.     (void) opcode;

  434.     uint16_t bc = z80->regs.bc, de = z80->regs.de, hl = z80->regs.hl;

  435.     z80->regs.bc = z80->regs.bc_;

  436.     z80->regs.de = z80->regs.de_;

  437.     z80->regs.hl = z80->regs.hl_;

  438.     z80->regs.bc_ = bc;

  439.     z80->regs.de_ = de;

  440.     z80->regs.hl_ = hl;

  441.     z80->regs.pc++;

  442.     return 4;

  443. }

  444. 

  445. /*

  446.     EX (SP), HL (0xE3):

  447.     Exchange the memory pointed to by SP with HL.

  448. */

  449. static uint8_t z80_inst_ex_sp_hl(Z80 *z80, uint8_t opcode)

  450. {

  451.     (void) opcode;

  452.     uint16_t hl = z80->regs.hl, sp = z80->regs.sp;

  453.     z80->regs.hl = mmu_read_double(z80->mmu, sp);

  454.     mmu_write_double(z80->mmu, sp, hl);

  455.     z80->regs.pc++;

  456.     return 19;

  457. }

  458. 

  459. /*

  460.     EX (SP), IXY (0xDDE3, 0xFDE3):

  461.     Exchange the memory pointed to by SP with IX or IY.

  462. */

  463. static uint8_t z80_inst_ex_sp_ixy(Z80 *z80, uint8_t opcode)

  464. {

  465.     (void) opcode;

  466.     uint16_t ixy = *z80->last_index, sp = z80->regs.sp;

  467.     *z80->last_index = mmu_read_double(z80->mmu, sp);

  468.     mmu_write_double(z80->mmu, sp, ixy);

  469.     z80->regs.pc++;

  470.     return 23;

  471. }

  472. 

  473. /*

  474.     LDI (0xEDA0):

  475.     LD (DE), (HL); INC HL; INC DE; DEC BC;

  476. */

  477. static uint8_t z80_inst_ldi(Z80 *z80, uint8_t opcode)

  478. {

  479.     (void) opcode;

  480.     uint16_t value = mmu_read_double(z80->mmu, z80->regs.hl);

  481.     mmu_write_double(z80->mmu, z80->regs.de, value);

  482. 

  483.     z80->regs.hl++;

  484.     z80->regs.de++;

  485.     z80->regs.bc--;

  486. 

  487.     update_flags(z80, 0, 0, z80->regs.bc == 0, 0, 0, 0, 0, 0, 0x16);

  488.     z80->regs.pc++;

  489.     return 16;

  490. }

  491. 

  492. /*

  493.     LDIR (0xEDB0):

  494.     LDI; JR PV, -2

  495. */

  496. static uint8_t z80_inst_ldir(Z80 *z80, uint8_t opcode)

  497. {

  498.     z80_inst_ldi(z80, opcode);

  499.     if (z80->regs.bc == 0)

  500.         return 16;

  501.     z80->regs.pc -= 2;

  502.     return 21;

  503. }

  504. 

  505. /*

  506.     LDD (0xEDA8):

  507.     LD (DE), (HL); DEC HL; DEC DE; DEC BC;

  508. */

  509. static uint8_t z80_inst_ldd(Z80 *z80, uint8_t opcode)

  510. {

  511.     (void) opcode;

  512.     uint16_t value = mmu_read_double(z80->mmu, z80->regs.hl);

  513.     mmu_write_double(z80->mmu, z80->regs.de, value);

  514. 

  515.     z80->regs.hl--;

  516.     z80->regs.de--;

  517.     z80->regs.bc--;

  518. 

  519.     update_flags(z80, 0, 0, z80->regs.bc == 0, 0, 0, 0, 0, 0, 0x16);

  520.     z80->regs.pc++;

  521.     return 16;

  522. }

  523. 

  524. /*

  525.     LDDR (0xEDB8):

  526.     LDD; JR PV, -2

  527. */

  528. static uint8_t z80_inst_lddr(Z80 *z80, uint8_t opcode)

  529. {

  530.     z80_inst_ldd(z80, opcode);

  531.     if (z80->regs.bc == 0)

  532.         return 16;

  533.     z80->regs.pc -= 2;

  534.     return 21;

  535. }

  536. 

  537. // CPI

  538. 

  539. // CPIR

  540. 

  541. // CPD

  542. 

  543. // CPDR

  544. 

  545. // ADD A, r

  546. 

  547. // ADD A, n

  548. 

  549. // ADD A, (HL)

  550. 

  551. // ADD A, (IXY+d)

  552. 

  553. // ADC A, r

  554. 

  555. // ADC A, n

  556. 

  557. // ADC A, (HL)

  558. 

  559. // ADC A, (IXY+d)

  560. 

  561. // SUB r

  562. 

  563. /*

  564.     SUB n (0xD6):

  565.     Subtract n (8-bit immediate) from A.

  566. */

  567. static uint8_t z80_inst_sub_n(Z80 *z80, uint8_t opcode)

  568. {

  569.     (void) opcode;

  570.     uint8_t imm = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  571.     uint8_t orig = z80->regs.a;

  572.     uint8_t a = z80->regs.a -= imm;

  573. 

  574.     bool c = (orig - imm) != a;

  575.     bool v = (orig - imm) != ((int8_t) a);

  576.     bool h = !!(((orig & 0x0F) - (imm & 0x0F)) & 0x10);

  577.     update_flags(z80, c, 1, v, !!(a & 0x08), h, !!(a & 0x20), a == 0,

  578.         !!(a & 0x80), 0xFF);

  579. 

  580.     z80->regs.pc++;

  581.     return 7;

  582. }

  583. 

  584. // SUB (HL)

  585. 

  586. // SUB (IXY+d)

  587. 

  588. // SBC A, r

  589. 

  590. // SBC A, n

  591. 

  592. // SBC A, (HL)

  593. 

  594. // SBC A, (IXY+d)

  595. 

  596. // AND r

  597. 

  598. /*

  599.     AND n (0xE6):

  600.     Bitwise AND A with n (8-bit immediate).

  601. */

  602. static uint8_t z80_inst_and_n(Z80 *z80, uint8_t opcode)

  603. {

  604.     (void) opcode;

  605.     uint8_t imm = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  606.     uint8_t a = (z80->regs.a &= imm);

  607. 

  608.     bool parity = !(__builtin_popcount(a) % 2);

  609.     update_flags(z80, 0, 0, parity, !!(a & 0x08), 1, !!(a & 0x20), a == 0,

  610.         !!(a & 0x80), 0xFF);

  611. 

  612.     z80->regs.pc++;

  613.     return 7;

  614. }

  615. 

  616. // AND (HL)

  617. 

  618. // AND (IXY+d)

  619. 

  620. /*

  621.     OR r (0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB7):

  622.     Bitwise OR A with r (8-bit register).

  623. */

  624. static uint8_t z80_inst_or_r(Z80 *z80, uint8_t opcode)

  625. {

  626.     uint8_t *reg = extract_reg(z80, opcode << 3);

  627.     uint8_t a = (z80->regs.a |= *reg);

  628. 

  629.     bool parity = !(__builtin_popcount(a) % 2);

  630.     update_flags(z80, 0, 0, parity, !!(a & 0x08), 0, !!(a & 0x20), a == 0,

  631.         !!(a & 0x80), 0xFF);

  632. 

  633.     z80->regs.pc++;

  634.     return 4;

  635. }

  636. 

  637. /*

  638.     OR n (0xF6):

  639.     Bitwise OR A with n (8-bit immediate).

  640. */

  641. static uint8_t z80_inst_or_n(Z80 *z80, uint8_t opcode)

  642. {

  643.     (void) opcode;

  644.     uint8_t imm = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  645.     uint8_t a = (z80->regs.a |= imm);

  646. 

  647.     bool parity = !(__builtin_popcount(a) % 2);

  648.     update_flags(z80, 0, 0, parity, !!(a & 0x08), 0, !!(a & 0x20), a == 0,

  649.         !!(a & 0x80), 0xFF);

  650. 

  651.     z80->regs.pc++;

  652.     return 7;

  653. }

  654. 

  655. // OR (HL)

  656. 

  657. /*

  658.     OR (IXY+d) (0xDDB6, 0xFDB6):

  659.     Bitwise OR A with (IX+d) or (IY+d).

  660. */

  661. static uint8_t z80_inst_or_ixy(Z80 *z80, uint8_t opcode)

  662. {

  663.     (void) opcode;

  664.     uint8_t addr = get_index_addr(z80, ++z80->regs.pc);

  665.     uint8_t val = mmu_read_byte(z80->mmu, addr);

  666.     uint8_t a = (z80->regs.a |= val);

  667. 

  668.     bool parity = !(__builtin_popcount(a) % 2);

  669.     update_flags(z80, 0, 0, parity, !!(a & 0x08), 0, !!(a & 0x20), a == 0,

  670.         !!(a & 0x80), 0xFF);

  671. 

  672.     z80->regs.pc++;

  673.     return 7;

  674. }

  675. 

  676. /*

  677.     XOR r (0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAF):

  678.     Bitwise XOR A with r (8-bit register).

  679. */

  680. static uint8_t z80_inst_xor_r(Z80 *z80, uint8_t opcode)

  681. {

  682.     uint8_t *reg = extract_reg(z80, opcode << 3);

  683.     uint8_t a = (z80->regs.a ^= *reg);

  684. 

  685.     bool parity = !(__builtin_popcount(a) % 2);

  686.     update_flags(z80, 0, 0, parity, !!(a & 0x08), 0, !!(a & 0x20), a == 0,

  687.         !!(a & 0x80), 0xFF);

  688. 

  689.     z80->regs.pc++;

  690.     return 4;

  691. }

  692. 

  693. /*

  694.     XOR n (0xEE):

  695.     Bitwise XOR A with n (8-bit immediate).

  696. */

  697. static uint8_t z80_inst_xor_n(Z80 *z80, uint8_t opcode)

  698. {

  699.     (void) opcode;

  700.     uint8_t imm = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  701.     uint8_t a = (z80->regs.a ^= imm);

  702. 

  703.     bool parity = !(__builtin_popcount(a) % 2);

  704.     update_flags(z80, 0, 0, parity, !!(a & 0x08), 0, !!(a & 0x20), a == 0,

  705.         !!(a & 0x80), 0xFF);

  706. 

  707.     z80->regs.pc++;

  708.     return 7;

  709. }

  710. 

  711. // XOR (HL)

  712. 

  713. // XOR (IXY+d)

  714. 

  715. /*

  716.     CP r (0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBF):

  717.     Set flags as if r (8-bit register) had been subtracted from A.

  718. */

  719. static uint8_t z80_inst_cp_r(Z80 *z80, uint8_t opcode)

  720. {

  721.     uint8_t *reg = extract_reg(z80, opcode << 3);

  722.     uint8_t d = z80->regs.a - *reg;

  723. 

  724.     bool c = (z80->regs.a - *reg) != d;

  725.     bool v = (z80->regs.a - *reg) != ((int8_t) d);

  726.     bool h = !!(((z80->regs.a & 0x0F) - (*reg & 0x0F)) & 0x10);

  727.     update_flags(z80, c, 1, v, !!(*reg & 0x08), h, !!(*reg & 0x20), d == 0,

  728.         !!(d & 0x80), 0xFF);

  729. 

  730.     z80->regs.pc++;

  731.     return 4;

  732. }

  733. 

  734. /*

  735.     CP n (0xFE):

  736.     Set flags as if n (8-bit immediate) had been subtracted from A.

  737. */

  738. static uint8_t z80_inst_cp_n(Z80 *z80, uint8_t opcode)

  739. {

  740.     (void) opcode;

  741.     uint8_t n = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  742.     uint8_t d = z80->regs.a - n;

  743. 

  744.     bool c = (z80->regs.a - n) != d;

  745.     bool v = (z80->regs.a - n) != ((int8_t) d);

  746.     bool h = !!(((z80->regs.a & 0x0F) - (n & 0x0F)) & 0x10);

  747.     update_flags(z80, c, 1, v, !!(n & 0x08), h, !!(n & 0x20), d == 0,

  748.         !!(d & 0x80), 0xFF);

  749. 

  750.     z80->regs.pc++;

  751.     return 7;

  752. }

  753. 

  754. /*

  755.     CP (HL) (0xBE):

  756.     Set flags as if the memory pointed to by HL had been subtracted from A.

  757. */

  758. static uint8_t z80_inst_cp_hl(Z80 *z80, uint8_t opcode)

  759. {

  760.     (void) opcode;

  761.     uint8_t n = mmu_read_byte(z80->mmu, z80->regs.hl);

  762.     uint8_t d = z80->regs.a - n;

  763. 

  764.     bool c = (z80->regs.a - n) != d;

  765.     bool v = (z80->regs.a - n) != ((int8_t) d);

  766.     bool h = !!(((z80->regs.a & 0x0F) - (n & 0x0F)) & 0x10);

  767.     update_flags(z80, c, 1, v, !!(n & 0x08), h, !!(n & 0x20), d == 0,

  768.         !!(d & 0x80), 0xFF);

  769. 

  770.     z80->regs.pc++;

  771.     return 7;

  772. }

  773. 

  774. // CP (IXY+d)

  775. 

  776. /*

  777.     INC r (0x04, 0x0C, 0x14, 0x1C, 0x24, 0x2C, 0x3C):

  778.     Increment r (8-bit register).

  779. */

  780. static uint8_t z80_inst_inc_r(Z80 *z80, uint8_t opcode)

  781. {

  782.     uint8_t *reg = extract_reg(z80, opcode);

  783.     bool halfcarry = !!(((*reg & 0x0F) + 1) & 0x10);

  784.     (*reg)++;

  785.     update_flags(z80, 0, 0, *reg == 0x80, !!(*reg & 0x08), halfcarry,

  786.         !!(*reg & 0x20), *reg == 0, !!(*reg & 0x80), 0xFE);

  787. 

  788.     z80->regs.pc++;

  789.     return 4;

  790. }

  791. 

  792. /*

  793.     INC (HL) (0x34):

  794.     Increment the memory address pointed to by HL.

  795. */

  796. static uint8_t z80_inst_inc_hl(Z80 *z80, uint8_t opcode)

  797. {

  798.     (void) opcode;

  799.     uint8_t byte = mmu_read_byte(z80->mmu, z80->regs.hl);

  800.     bool halfcarry = !!(((byte & 0x0F) + 1) & 0x10);

  801.     mmu_write_byte(z80->mmu, z80->regs.hl, ++byte);

  802.     update_flags(z80, 0, 0, byte == 0x80, !!(byte & 0x08), halfcarry,

  803.         !!(byte & 0x20), byte == 0, !!(byte & 0x80), 0xFE);

  804. 

  805.     z80->regs.pc++;

  806.     return 11;

  807. }

  808. 

  809. // INC (IXY+d)

  810. 

  811. /*

  812.     DEC r (0x05, 0x0D, 0x15, 0x1D, 0x25, 0x2D, 0x3D):

  813.     Decrement r (8-bit register).

  814. */

  815. static uint8_t z80_inst_dec_r(Z80 *z80, uint8_t opcode)

  816. {

  817.     uint8_t *reg = extract_reg(z80, opcode);

  818.     bool halfcarry = !!(((*reg & 0x0F) - 1) & 0x10);

  819.     (*reg)--;

  820.     update_flags(z80, 0, 1, *reg == 0x7F, !!(*reg & 0x08), halfcarry,

  821.         !!(*reg & 0x20), *reg == 0, !!(*reg & 0x80), 0xFE);

  822. 

  823.     z80->regs.pc++;

  824.     return 4;

  825. }

  826. 

  827. /*

  828.     DEC (HL) (0x35):

  829.     Decrement the memory address pointed to by HL.

  830. */

  831. static uint8_t z80_inst_dec_hl(Z80 *z80, uint8_t opcode)

  832. {

  833.     (void) opcode;

  834.     uint8_t byte = mmu_read_byte(z80->mmu, z80->regs.hl);

  835.     bool halfcarry = !!(((byte & 0x0F) + 1) & 0x10);

  836.     mmu_write_byte(z80->mmu, z80->regs.hl, --byte);

  837.     update_flags(z80, 0, 1, byte == 0x7F, !!(byte & 0x08), halfcarry,

  838.         !!(byte & 0x20), byte == 0, !!(byte & 0x80), 0xFE);

  839. 

  840.     z80->regs.pc++;

  841.     return 11;

  842. }

  843. 

  844. // DEC (IXY+d)

  845. 

  846. // DAA

  847. 

  848. // CPL

  849. 

  850. // NEG

  851. 

  852. // CCF

  853. 

  854. // SCF

  855. 

  856. /*

  857.     NOP (0x00):

  858.     No operation is performed.

  859. */

  860. static uint8_t z80_inst_nop(Z80 *z80, uint8_t opcode)

  861. {

  862.     (void) opcode;

  863.     z80->regs.pc++;

  864.     return 4;

  865. }

  866. 

  867. /*

  868.     HALT (0x76):

  869.     Suspend CPU operation: execute NOPs until an interrupt or reset.

  870. */

  871. static uint8_t z80_inst_halt(Z80 *z80, uint8_t opcode)

  872. {

  873.     (void) z80;

  874.     (void) opcode;

  875.     return 4;

  876. }

  877. 

  878. /*

  879.     DI (0xF3):

  880.     Disable maskable interrupts by resetting both flip-flops.

  881. */

  882. static uint8_t z80_inst_di(Z80 *z80, uint8_t opcode)

  883. {

  884.     (void) opcode;

  885.     z80->regs.iff1 = false;

  886.     z80->regs.iff2 = false;

  887.     z80->regs.pc++;

  888.     return 4;

  889. }

  890. 

  891. /*

  892.     EI (0xFB):

  893.     Enable maskable interrupts by setting both flip-flops.

  894. */

  895. static uint8_t z80_inst_ei(Z80 *z80, uint8_t opcode)

  896. {

  897.     (void) opcode;

  898.     z80->regs.iff1 = true;

  899.     z80->regs.iff2 = true;

  900.     z80->regs.pc++;

  901.     return 4;

  902. }

  903. 

  904. /*

  905.     IM (0xED46, 0xED4E, 0xED56, 0xED5E, 0xED66, 0xED6E, 0xED76, 0xED7E):

  906.     Set the interrupt mode.

  907. */

  908. static uint8_t z80_inst_im(Z80 *z80, uint8_t opcode)

  909. {

  910.     switch (opcode) {

  911.         case 0x46:

  912.         case 0x4E:

  913.         case 0x66:

  914.         case 0x6E:

  915.             z80->regs.im_a = false;  // Interrupt mode 0

  916.             z80->regs.im_b = false;

  917.             break;

  918.         case 0x56:

  919.         case 0x76:

  920.             z80->regs.im_a = true;  // Interrupt mode 1

  921.             z80->regs.im_b = false;

  922.             break;

  923.         case 0x5E:

  924.         case 0x7E:

  925.             z80->regs.im_a = true;  // Interrupt mode 2

  926.             z80->regs.im_b = true;

  927.             break;

  928.     }

  929. 

  930.     z80->regs.pc++;

  931.     return 8;

  932. }

  933. 

  934. /*

  935.     ADD HL, ss (0x09, 0x19, 0x29, 0x39):

  936.     Add ss to HL.

  937. */

  938. static uint8_t z80_inst_add_hl_ss(Z80 *z80, uint8_t opcode)

  939. {

  940.     uint16_t lh = z80->regs.hl, rh = *extract_pair(z80, opcode);

  941.     uint16_t value = lh + rh;

  942.     z80->regs.hl = value;

  943. 

  944.     bool h = !!(((lh & 0x0FFF) + (rh & 0x0FFF)) & 0x1000);

  945.     update_flags(z80, (lh + rh) != value, 0, 0, !!(value & 0x0800), h,

  946.         !!(value & 0x2000), 0, 0, 0x3B);

  947. 

  948.     z80->regs.pc++;

  949.     return 11;

  950. }

  951. 

  952. // ADC HL, ss

  953. 

  954. /*

  955.     SBC HL, ss (0xED42, 0xED52, 0xED62, 0xED72):

  956.     Subtract ss with carry from HL.

  957. */

  958. static uint8_t z80_inst_sbc_hl_ss(Z80 *z80, uint8_t opcode)

  959. {

  960.     uint16_t minu = z80->regs.hl;

  961.     uint16_t subtra = *extract_pair(z80, opcode) + get_flag(z80, FLAG_CARRY);

  962.     uint16_t value = minu - subtra;

  963.     z80->regs.hl = value;

  964. 

  965.     bool c  = (minu - subtra) != value;

  966.     bool ov = (minu - subtra) != ((int16_t) value);

  967.     bool hc = !!(((minu & 0x0FFF) - (subtra & 0x0FFF)) & 0x1000);

  968. 

  969.     update_flags(z80, c, 1, ov, !!(value & 0x0800), hc,

  970.         !!(value & 0x2000), value == 0, !!(value & 0x8000), 0xFF);

  971. 

  972.     z80->regs.pc++;

  973.     return 15;

  974. }

  975. 

  976. // ADD IXY, pp

  977. 

  978. /*

  979.     INC ss (0x03, 0x13, 0x23, 0x33):

  980.     Increment ss (16-bit register).

  981. */

  982. static uint8_t z80_inst_inc_ss(Z80 *z80, uint8_t opcode)

  983. {

  984.     (*extract_pair(z80, opcode))++;

  985.     z80->regs.pc++;

  986.     return 6;

  987. }

  988. 

  989. // INC IXY

  990. 

  991. /*

  992.     DEC ss (0x0B, 0x1B, 0x2B, 0x3B):

  993.     Decrement ss (16-bit register).

  994. */

  995. static uint8_t z80_inst_dec_ss(Z80 *z80, uint8_t opcode)

  996. {

  997.     (*extract_pair(z80, opcode))--;

  998.     z80->regs.pc++;

  999.     return 6;

  1000. }

  1001. 

  1002. // DEC IXY

  1003. 

  1004. // RLCA

  1005. 

  1006. // RLA

  1007. 

  1008. // RRCA

  1009. 

  1010. // RRA

  1011. 

  1012. // RLC r

  1013. 

  1014. // RLC (HL)

  1015. 

  1016. // RLC (IXY+d)

  1017. 

  1018. // RL r

  1019. 

  1020. // RL (HL)

  1021. 

  1022. // RL (IXY+d)

  1023. 

  1024. // RRC r

  1025. 

  1026. // RRC (HL)

  1027. 

  1028. // RRC (IXY+d)

  1029. 

  1030. // RR r

  1031. 

  1032. // RR (HL)

  1033. 

  1034. // RR (IXY+d)

  1035. 

  1036. // SLA r

  1037. 

  1038. // SLA (HL)

  1039. 

  1040. // SLA (IXY+d)

  1041. 

  1042. // SRA r

  1043. 

  1044. // SRA (HL)

  1045. 

  1046. // SRA (IXY+d)

  1047. 

  1048. // SRL r

  1049. 

  1050. // SRL (HL)

  1051. 

  1052. // SRL (IXY+d)

  1053. 

  1054. // RLD

  1055. 

  1056. // RRD

  1057. 

  1058. /*

  1059.     BIT b, r   (0xCB40, 0xCB41, 0xCB42, 0xCB43, 0xCB44, 0xCB45, 0xCB47, 0xCB48,

  1060.         0xCB49, 0xCB4A, 0xCB4B, 0xCB4C, 0xCB4D, 0xCB4F, 0xCB50, 0xCB51, 0xCB52,

  1061.         0xCB53, 0xCB54, 0xCB55, 0xCB57, 0xCB58, 0xCB59, 0xCB5A, 0xCB5B, 0xCB5C,

  1062.         0xCB5D, 0xCB5F, 0xCB60, 0xCB61, 0xCB62, 0xCB63, 0xCB64, 0xCB65, 0xCB67,

  1063.         0xCB68, 0xCB69, 0xCB6A, 0xCB6B, 0xCB6C, 0xCB6D, 0xCB6F, 0xCB70, 0xCB71,

  1064.         0xCB72, 0xCB73, 0xCB74, 0xCB75, 0xCB77, 0xCB78, 0xCB79, 0xCB7A, 0xCB7B,

  1065.         0xCB7C, 0xCB7D, 0xCB7F):

  1066.     Test bit b of r (8-bit register).

  1067. */

  1068. static uint8_t z80_inst_bit_b_r(Z80 *z80, uint8_t opcode)

  1069. {

  1070.     uint8_t *reg = extract_reg(z80, opcode << 3);

  1071.     uint8_t bit = (opcode >> 3) & 0x07;

  1072.     bool z = (((*reg) >> bit) & 1) == 0;

  1073.     if (z)

  1074.         update_flags(z80, 0, 0, 1, 0, 1, 0, 1, 0, 0xFE);

  1075.     else

  1076.         update_flags(z80, 0, 0, 0, bit == 3, 1, bit == 5, 0, bit == 7, 0xFE);

  1077.     z80->regs.pc++;

  1078.     return 8;

  1079. }

  1080. 

  1081. /*

  1082.     BIT b, (HL) (0xCB46, 0xCB4E, 0xCB56, 0xCB5E, 0xCB66, 0xCB6E, 0xCB76,

  1083.         0xCB7E):

  1084.     Test bit b of (HL).

  1085. */

  1086. static uint8_t z80_inst_bit_b_hl(Z80 *z80, uint8_t opcode)

  1087. {

  1088.     uint8_t val = mmu_read_byte(z80->mmu, z80->regs.hl);

  1089.     uint8_t bit = (opcode >> 3) & 0x07;

  1090.     bool z = ((val >> bit) & 1) == 0;

  1091.     if (z)

  1092.         update_flags(z80, 0, 0, 1, 0, 1, 0, 1, 0, 0xFE);

  1093.     else

  1094.         update_flags(z80, 0, 0, 0, bit == 3, 1, bit == 5, 0, bit == 7, 0xFE);

  1095.     z80->regs.pc++;

  1096.     return 8;

  1097. }

  1098. 

  1099. /*

  1100.     BIT b, (IXY+d) (0xDDCB40-0xDDCB7F, 0xFDCB40-0xFDCB7F):

  1101.     Test bit b of (IX+d) or (IY+d).

  1102. */

  1103. static uint8_t z80_inst_bit_b_ixy(Z80 *z80, uint8_t opcode)

  1104. {

  1105.     uint16_t addr = get_index_addr(z80, z80->regs.pc - 1);

  1106.     uint8_t val = mmu_read_byte(z80->mmu, addr);

  1107.     uint8_t bit = (opcode >> 3) & 0x07;

  1108.     bool z = ((val >> bit) & 1) == 0;

  1109.     if (z)

  1110.         update_flags(z80, 0, 0, 1, 0, 1, 0, 1, 0, 0xFE);

  1111.     else

  1112.         update_flags(z80, 0, 0, 0, bit == 3, 1, bit == 5, 0, bit == 7, 0xFE);

  1113.     z80->regs.pc++;

  1114.     return 8;

  1115. }

  1116. 

  1117. // SET b, r

  1118. 

  1119. // SET b, (HL)

  1120. 

  1121. // SET b, (IXY+d)

  1122. 

  1123. // RES b, r

  1124. 

  1125. /*

  1126.     RES b, (HL) (0xCB86, 0xCB8E, 0xCB96, 0xCB9E, 0xCBA6, 0xCBAE, 0xCBB6,

  1127.         0xCBBE):

  1128.     Reset bit b of (HL).

  1129. */

  1130. static uint8_t z80_inst_res_b_hl(Z80 *z80, uint8_t opcode)

  1131. {

  1132.     uint8_t val = mmu_read_byte(z80->mmu, z80->regs.hl);

  1133.     uint8_t bit = (opcode >> 3) & 0x07;

  1134.     val &= ~(1 << bit);

  1135.     mmu_write_byte(z80->mmu, z80->regs.hl, val);

  1136.     z80->regs.pc++;

  1137.     return 8;

  1138. }

  1139. 

  1140. // RES b, (IXY+d)

  1141. 

  1142. /*

  1143.     JP nn (0xC3):

  1144.     Jump to nn (16-bit immediate).

  1145. */

  1146. static uint8_t z80_inst_jp_nn(Z80 *z80, uint8_t opcode)

  1147. {

  1148.     (void) opcode;

  1149.     z80->regs.pc = mmu_read_double(z80->mmu, ++z80->regs.pc);

  1150.     return 10;

  1151. }

  1152. 

  1153. /*

  1154.     JP cc, nn (0xC2, 0xCA, 0xD2, 0xDA, 0xE2, 0xEA, 0xF2, 0xFA):

  1155.     Jump to nn (16-bit immediate) if cc (condition) is true.

  1156. */

  1157. static uint8_t z80_inst_jp_cc_nn(Z80 *z80, uint8_t opcode)

  1158. {

  1159.     if (extract_cond(z80, opcode))

  1160.         z80->regs.pc = mmu_read_double(z80->mmu, ++z80->regs.pc);

  1161.     else

  1162.         z80->regs.pc += 3;

  1163.     return 10;

  1164. }

  1165. 

  1166. /*

  1167.     JR e (0x18):

  1168.     Relative jump e (signed 8-bit immediate) bytes.

  1169. */

  1170. static uint8_t z80_inst_jr_e(Z80 *z80, uint8_t opcode)

  1171. {

  1172.     (void) opcode;

  1173.     int8_t jump = mmu_read_byte(z80->mmu, z80->regs.pc + 1);

  1174.     z80->regs.pc += jump + 2;

  1175.     return 12;

  1176. }

  1177. 

  1178. 

  1179. /*

  1180.     JR cc, e (0x20, 0x28, 0x30, 0x38):

  1181.     Relative jump e (signed 8-bit immediate) bytes if cc (condition) is true.

  1182. */

  1183. static uint8_t z80_inst_jr_cc_e(Z80 *z80, uint8_t opcode)

  1184. {

  1185.     if (extract_cond(z80, opcode - 0x20)) {

  1186.         int8_t jump = mmu_read_byte(z80->mmu, z80->regs.pc + 1);

  1187.         z80->regs.pc += jump + 2;

  1188.         return 12;

  1189.     } else {

  1190.         z80->regs.pc += 2;

  1191.         return 7;

  1192.     }

  1193. }

  1194. 

  1195. /*

  1196.     JP (HL) (0xE9):

  1197.     Jump to HL (*NOT* the memory pointed to by HL).

  1198. */

  1199. static uint8_t z80_inst_jp_hl(Z80 *z80, uint8_t opcode)

  1200. {

  1201.     (void) opcode;

  1202.     z80->regs.pc = z80->regs.hl;

  1203.     return 4;

  1204. }

  1205. 

  1206. /*

  1207.     JP (IXY) (0xDDE9, 0xFDE9):

  1208.     Jump to IX or IY.

  1209. */

  1210. static uint8_t z80_inst_jp_ixy(Z80 *z80, uint8_t opcode)

  1211. {

  1212.     (void) opcode;

  1213.     z80->regs.pc = *z80->last_index;

  1214.     return 8;

  1215. }

  1216. 

  1217. /*

  1218.     DJNZ, e (0x10):

  1219.     Decrement B and relative jump e bytes (signed 8-bit immediate) if non-zero.

  1220. */

  1221. static uint8_t z80_inst_djnz_e(Z80 *z80, uint8_t opcode)

  1222. {

  1223.     (void) opcode;

  1224.     z80->regs.b--;

  1225.     if (z80->regs.b != 0) {

  1226.         int8_t jump = mmu_read_byte(z80->mmu, z80->regs.pc + 1);

  1227.         z80->regs.pc += jump + 2;

  1228.         return 13;

  1229.     } else {

  1230.         z80->regs.pc += 2;

  1231.         return 8;

  1232.     }

  1233. }

  1234. 

  1235. /*

  1236.     CALL nn (0xCD):

  1237.     Push PC+3 onto the stack and jump to nn (16-bit immediate).

  1238. */

  1239. static uint8_t z80_inst_call_nn(Z80 *z80, uint8_t opcode)

  1240. {

  1241.     (void) opcode;

  1242.     stack_push(z80, z80->regs.pc + 3);

  1243.     z80->regs.pc = mmu_read_double(z80->mmu, ++z80->regs.pc);

  1244.     return 17;

  1245. }

  1246. 

  1247. /*

  1248.     CALL cc, nn (0xC4, 0xCC, 0xD4, 0xDC, 0xE4, 0xEC, 0xF4, 0xFC):

  1249.     Push PC+3 onto the stack and jump to nn (16-bit immediate) if cc is true.

  1250. */

  1251. static uint8_t z80_inst_call_cc_nn(Z80 *z80, uint8_t opcode)

  1252. {

  1253.     if (extract_cond(z80, opcode)) {

  1254.         stack_push(z80, z80->regs.pc + 3);

  1255.         z80->regs.pc = mmu_read_double(z80->mmu, ++z80->regs.pc);

  1256.         return 17;

  1257.     } else {

  1258.         z80->regs.pc += 3;

  1259.         return 10;

  1260.     }

  1261. }

  1262. 

  1263. /*

  1264.     RET (0xC9):

  1265.     Pop PC from the stack.

  1266. */

  1267. static uint8_t z80_inst_ret(Z80 *z80, uint8_t opcode)

  1268. {

  1269.     (void) opcode;

  1270.     z80->regs.pc = stack_pop(z80);

  1271.     return 10;

  1272. }

  1273. 

  1274. /*

  1275.     RET cc (0xC0, 0xC8, 0xD0, 0xD8, 0xE0, 0xE8, 0xF0, 0xF8):

  1276.     Pop PC from the stack if cc is true.

  1277. */

  1278. static uint8_t z80_inst_ret_cc(Z80 *z80, uint8_t opcode)

  1279. {

  1280.     if (extract_cond(z80, opcode)) {

  1281.         z80->regs.pc = stack_pop(z80);

  1282.         return 11;

  1283.     } else {

  1284.         z80->regs.pc++;

  1285.         return 5;

  1286.     }

  1287. }

  1288. 

  1289. /*

  1290.     RETI (0xED4D):

  1291.     Pop PC from the stack.

  1292. */

  1293. static uint8_t z80_inst_reti(Z80 *z80, uint8_t opcode)

  1294. {

  1295.     (void) opcode;

  1296.     z80->regs.pc = stack_pop(z80);

  1297.     return 14;

  1298. }

  1299. 

  1300. /*

  1301.     RETN (0xED45, 0xED55, 0xED5D, 0xED65, 0xED6D, 0xED75, 0xED7D):

  1302.     Pop PC from the stack, and copy to IFF2 to IFF1.

  1303. */

  1304. static uint8_t z80_inst_retn(Z80 *z80, uint8_t opcode)

  1305. {

  1306.     (void) opcode;

  1307.     z80->regs.pc = stack_pop(z80);

  1308.     z80->regs.iff1 = z80->regs.iff2;

  1309.     return 14;

  1310. }

  1311. 

  1312. /*

  1313.     RST p (0xC7, 0xCF, 0xD7, 0xDF, 0xE7, 0xEF, 0xF7, 0xFF):

  1314.     Push PC+1 onto the stack and jump to p (opcode & 0x38).

  1315. */

  1316. static uint8_t z80_inst_rst_p(Z80 *z80, uint8_t opcode)

  1317. {

  1318.     stack_push(z80, z80->regs.pc + 1);

  1319.     z80->regs.pc = opcode & 0x38;

  1320.     return 11;

  1321. }

  1322. 

  1323. /*

  1324.     IN A, (n) (0xDB):

  1325.     Read a byte from port n into A.

  1326. */

  1327. static uint8_t z80_inst_in_a_n(Z80 *z80, uint8_t opcode)

  1328. {

  1329.     (void) opcode;

  1330.     uint8_t port = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  1331.     z80->regs.a = read_port(z80, port);

  1332.     z80->regs.pc++;

  1333.     return 11;

  1334. }

  1335. 

  1336. /*

  1337.     IN r, (C) (0xED40, 0xED48, 0xED50, 0xED58, 0xED60, 0xED68, 0xED70, 0xED78):

  1338.     Read a byte from port C into r, or affect flags only if 0xED70.

  1339. */

  1340. static uint8_t z80_inst_in_r_c(Z80 *z80, uint8_t opcode)

  1341. {

  1342.     uint8_t data = read_port(z80, z80->regs.c);

  1343.     bool parity = !(__builtin_popcount(data) % 2);

  1344. 

  1345.     if (opcode != 0x70)

  1346.         *extract_reg(z80, opcode) = data;

  1347.     update_flags(z80, 0, 0, parity, !!(data & 0x08), 0, !!(data & 0x20),

  1348.         data == 0, !!(data & 0x80), 0xFE);

  1349.     z80->regs.pc++;

  1350.     return 12;

  1351. }

  1352. 

  1353. /*

  1354.     INI (0xEDA2):

  1355.     IN (HL), (C); INC HL; DEC B

  1356. */

  1357. static uint8_t z80_inst_ini(Z80 *z80, uint8_t opcode)

  1358. {

  1359.     (void) opcode;

  1360.     uint8_t data = read_port(z80, z80->regs.c), *b = &z80->regs.b;

  1361.     bool h = !!(((*b & 0x0F) - 1) & 0x10);

  1362. 

  1363.     mmu_write_byte(z80->mmu, z80->regs.hl, data);

  1364.     z80->regs.hl++;

  1365.     (*b)--;

  1366. 

  1367.     update_flags(z80, 0, 1, *b == 0x7F, !!(*b & 0x08), h, !!(*b & 0x20),

  1368.         *b == 0, !!(*b & 0x80), 0xFE);

  1369.     z80->regs.pc++;

  1370.     return 16;

  1371. }

  1372. 

  1373. /*

  1374.     INIR (0xEDB2):

  1375.     INI; JR NZ, -2

  1376. */

  1377. static uint8_t z80_inst_inir(Z80 *z80, uint8_t opcode)

  1378. {

  1379.     z80_inst_ini(z80, opcode);

  1380.     if (z80->regs.b == 0)

  1381.         return 16;

  1382.     z80->regs.pc -= 2;

  1383.     return 21;

  1384. }

  1385. 

  1386. /*

  1387.     IND (0xEDAA):

  1388.     IN (HL), (C); DEC HL; DEC B

  1389. */

  1390. static uint8_t z80_inst_ind(Z80 *z80, uint8_t opcode)

  1391. {

  1392.     (void) opcode;

  1393.     uint8_t data = read_port(z80, z80->regs.c), *b = &z80->regs.b;

  1394.     bool h = !!(((*b & 0x0F) - 1) & 0x10);

  1395. 

  1396.     mmu_write_byte(z80->mmu, z80->regs.hl, data);

  1397.     z80->regs.hl--;

  1398.     (*b)--;

  1399. 

  1400.     update_flags(z80, 0, 1, *b == 0x7F, !!(*b & 0x08), h, !!(*b & 0x20),

  1401.         *b == 0, !!(*b & 0x80), 0xFE);

  1402.     z80->regs.pc++;

  1403.     return 16;

  1404. }

  1405. 

  1406. /*

  1407.     INDR (0xEDBA):

  1408.     IND; JR NZ, -2

  1409. */

  1410. static uint8_t z80_inst_indr(Z80 *z80, uint8_t opcode)

  1411. {

  1412.     z80_inst_ind(z80, opcode);

  1413.     if (z80->regs.b == 0)

  1414.         return 16;

  1415.     z80->regs.pc -= 2;

  1416.     return 21;

  1417. }

  1418. 

  1419. /*

  1420.     OUT (n), A (0xD3):

  1421.     Write a byte from A into port n.

  1422. */

  1423. static uint8_t z80_inst_out_n_a(Z80 *z80, uint8_t opcode)

  1424. {

  1425.     (void) opcode;

  1426.     uint8_t port = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  1427.     write_port(z80, port, z80->regs.a);

  1428.     z80->regs.pc++;

  1429.     return 11;

  1430. }

  1431. 

  1432. /*

  1433.     OUT (C), r (0xED41, 0xED49, 0xED51, 0xED59, 0xED61, 0xED69, 0xED71,

  1434.         0xED79):

  1435.     Write a byte from r (8-bit reg, or 0 if 0xED71) into port C.

  1436. */

  1437. static uint8_t z80_inst_out_c_r(Z80 *z80, uint8_t opcode)

  1438. {

  1439.     uint8_t value = opcode != 0x71 ? *extract_reg(z80, opcode) : 0;

  1440.     write_port(z80, z80->regs.c, value);

  1441.     z80->regs.pc++;

  1442.     return 12;

  1443. }

  1444. 

  1445. /*

  1446.     OUTI (0xEDA3):

  1447.     OUT (C), (HL); INC HL; DEC B

  1448. */

  1449. static uint8_t z80_inst_outi(Z80 *z80, uint8_t opcode)

  1450. {

  1451.     (void) opcode;

  1452.     uint8_t *b = &z80->regs.b;

  1453.     bool h = !!(((*b & 0x0F) - 1) & 0x10);

  1454. 

  1455.     write_port(z80, z80->regs.c, mmu_read_byte(z80->mmu, z80->regs.hl));

  1456.     z80->regs.hl++;

  1457.     (*b)--;

  1458. 

  1459.     update_flags(z80, 0, 1, *b == 0x7F, !!(*b & 0x08), h, !!(*b & 0x20),

  1460.         *b == 0, !!(*b & 0x80), 0xFE);

  1461.     z80->regs.pc++;

  1462.     return 16;

  1463. }

  1464. 

  1465. /*

  1466.     OTIR (0xEDB3):

  1467.     OUTI; JR NZ, -2

  1468. */

  1469. static uint8_t z80_inst_otir(Z80 *z80, uint8_t opcode)

  1470. {

  1471.     z80_inst_outi(z80, opcode);

  1472.     if (z80->regs.b == 0)

  1473.         return 16;

  1474.     z80->regs.pc -= 2;

  1475.     return 21;

  1476. }

  1477. 

  1478. /*

  1479.     OUTD (0xEDAB):

  1480.     OUT (C), (HL); DEC HL; DEC B

  1481. */

  1482. static uint8_t z80_inst_outd(Z80 *z80, uint8_t opcode)

  1483. {

  1484.     (void) opcode;

  1485.     uint8_t *b = &z80->regs.b;

  1486.     bool h = !!(((*b & 0x0F) - 1) & 0x10);

  1487. 

  1488.     write_port(z80, z80->regs.c, mmu_read_byte(z80->mmu, z80->regs.hl));

  1489.     z80->regs.hl--;

  1490.     (*b)--;

  1491. 

  1492.     update_flags(z80, 0, 1, *b == 0x7F, !!(*b & 0x08), h, !!(*b & 0x20),

  1493.         *b == 0, !!(*b & 0x80), 0xFE);

  1494.     z80->regs.pc++;

  1495.     return 16;

  1496. }

  1497. 

  1498. /*

  1499.     OTDR (0xEDBB):

  1500.     OUTD; JR NZ, -2

  1501. */

  1502. static uint8_t z80_inst_otdr(Z80 *z80, uint8_t opcode)

  1503. {

  1504.     z80_inst_outd(z80, opcode);

  1505.     if (z80->regs.b == 0)

  1506.         return 16;

  1507.     z80->regs.pc -= 2;

  1508.     return 21;

  1509. }

  1510. 

  1511. /*

  1512.     NOP2:

  1513.     No operation is performed twice; i.e., 2 NOPs-worth of cycles are spent.

  1514.     Used for unimplemented extended and index instructions.

  1515. */

  1516. static uint8_t z80_inst_nop2(Z80 *z80, uint8_t opcode)

  1517. {

  1518.     (void) opcode;

  1519.     z80->regs.pc++;

  1520.     return 8;

  1521. }

  1522. 

  1523. /*

  1524.     0xED:

  1525.     Handle an extended instruction.

  1526. */

  1527. static uint8_t z80_prefix_extended(Z80 *z80, uint8_t opcode)

  1528. {

  1529.     opcode = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  1530.     return (*instruction_table_extended[opcode])(z80, opcode);

  1531. }

  1532. 

  1533. /*

  1534.     0xED:

  1535.     Handle a bit instruction.

  1536. */

  1537. static uint8_t z80_prefix_bits(Z80 *z80, uint8_t opcode)

  1538. {

  1539.     opcode = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  1540.     return (*instruction_table_bits[opcode])(z80, opcode);

  1541. }

  1542. 

  1543. /*

  1544.     0xDD, 0xFD:

  1545.     Handle an index instruction.

  1546. */

  1547. static uint8_t z80_prefix_index(Z80 *z80, uint8_t opcode)

  1548. {

  1549.     z80->last_index = (opcode == 0xDD) ? &z80->regs.ix : &z80->regs.iy;

  1550.     opcode = mmu_read_byte(z80->mmu, ++z80->regs.pc);

  1551.     return (*instruction_table_index[opcode])(z80, opcode);

  1552. }

  1553. 

  1554. /*

  1555.     0xDDCB, 0xFDCB:

  1556.     Handle an index-bit instruction.

  1557. */

  1558. static uint8_t z80_prefix_index_bits(Z80 *z80, uint8_t opcode)

  1559. {

  1560.     opcode = mmu_read_byte(z80->mmu, z80->regs.pc += 2);

  1561.     return (*instruction_table_index_bits[opcode])(z80, opcode);

  1562. }

  1563. 

  1564. #include "z80_tables.inc.c"