An emulator, assembler, and disassembler for the Sega Game Gear
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  1. /* Copyright (C) 2014-2016 Ben Kurtovic <ben.kurtovic@gmail.com>
  2. Released under the terms of the MIT License. See LICENSE for details. */
  3. #include <string.h>
  4. #include <SDL.h>
  5. #include "vdp.h"
  6. #include "util.h"
  7. #define CODE_VRAM_READ 0
  8. #define CODE_VRAM_WRITE 1
  9. #define CODE_REG_WRITE 2
  10. #define CODE_CRAM_WRITE 3
  11. /*
  12. Initialize the Video Display Processor (VDP).
  13. The VDP will write to its pixels array whenever it draws a scanline. It
  14. defaults to NULL, but you should set it to something if you want to see its
  15. output.
  16. */
  17. void vdp_init(VDP *vdp)
  18. {
  19. vdp->pixels = NULL;
  20. vdp->vram = cr_malloc(sizeof(uint8_t) * VDP_VRAM_SIZE);
  21. vdp->cram = cr_malloc(sizeof(uint8_t) * VDP_CRAM_SIZE);
  22. memset(vdp->vram, 0x00, VDP_VRAM_SIZE);
  23. memset(vdp->cram, 0x00, VDP_CRAM_SIZE);
  24. }
  25. /*
  26. Free memory previously allocated by the VDP.
  27. */
  28. void vdp_free(VDP *vdp)
  29. {
  30. free(vdp->vram);
  31. }
  32. /*
  33. Power on the VDP, setting up initial state.
  34. */
  35. void vdp_power(VDP *vdp)
  36. {
  37. vdp->regs[0x00] = 0x00;
  38. vdp->regs[0x01] = 0x00;
  39. vdp->regs[0x02] = 0xFF;
  40. vdp->regs[0x03] = 0xFF;
  41. vdp->regs[0x04] = 0xFF;
  42. vdp->regs[0x05] = 0xFF;
  43. vdp->regs[0x06] = 0xFF;
  44. vdp->regs[0x07] = 0x00;
  45. vdp->regs[0x08] = 0x00;
  46. vdp->regs[0x09] = 0x00;
  47. vdp->regs[0x0A] = 0x01;
  48. vdp->h_counter = 0;
  49. vdp->v_counter = 0;
  50. vdp->v_count_jump = false;
  51. vdp->control_code = 0;
  52. vdp->control_addr = 0;
  53. vdp->control_flag = false;
  54. vdp->stat_int = vdp->stat_ovf = vdp->stat_col = 0;
  55. vdp->read_buf = 0;
  56. vdp->cram_latch = 0;
  57. }
  58. /*
  59. Return whether frame-completion interrupts are enabled.
  60. */
  61. static bool should_frame_interrupt(const VDP *vdp)
  62. {
  63. return vdp->regs[0x01] & 0x20;
  64. }
  65. /*
  66. Return the base address of the pattern name table.
  67. */
  68. static uint16_t get_pnt_base(const VDP *vdp)
  69. {
  70. return (vdp->regs[0x02] & 0x0E) << 10;
  71. }
  72. /*
  73. Return the base address of the sprite attribute table.
  74. */
  75. static uint16_t get_sat_base(const VDP *vdp)
  76. {
  77. return (vdp->regs[0x05] & 0x7E) << 7;
  78. }
  79. /*
  80. Return the base address of the sprite generator table.
  81. */
  82. static uint16_t get_sgt_base(const VDP *vdp)
  83. {
  84. return (vdp->regs[0x06] & 0x04) << 11;
  85. }
  86. /*
  87. Return the backdrop color as a CRAM index.
  88. */
  89. static uint8_t get_backdrop_color(const VDP *vdp)
  90. {
  91. return ((vdp->regs[0x07] & 0x0F) << 1) + 0x20;
  92. }
  93. /*
  94. Return the horizontal background scroll value.
  95. */
  96. static uint8_t get_bg_hscroll(const VDP *vdp)
  97. {
  98. return vdp->regs[0x08];
  99. }
  100. /*
  101. Return the vertical background scroll value.
  102. */
  103. static uint8_t get_bg_vscroll(const VDP *vdp)
  104. {
  105. return vdp->regs[0x09];
  106. }
  107. /*
  108. Return the packed background tile at the given row and column.
  109. */
  110. static uint16_t get_background_tile(const VDP *vdp, uint8_t row, uint8_t col)
  111. {
  112. uint8_t *pnt = vdp->vram + get_pnt_base(vdp);
  113. uint16_t index = row * 32 + col;
  114. return pnt[2 * index] + (pnt[2 * index + 1] << 8);
  115. }
  116. /*
  117. Get the CRAM color index of the given (row, col) in the given pattern.
  118. */
  119. static uint8_t read_pattern(const VDP *vdp, uint16_t pattern,
  120. uint8_t row, uint8_t col)
  121. {
  122. uint8_t *planes = &vdp->vram[32 * pattern + 4 * row];
  123. return ((planes[0] >> (7 - col)) & 1) +
  124. (((planes[1] >> (7 - col)) & 1) << 1) +
  125. (((planes[2] >> (7 - col)) & 1) << 2) +
  126. (((planes[3] >> (7 - col)) & 1) << 3);
  127. }
  128. /*
  129. Return the BGR444 color at the given CRAM index.
  130. The index should be between 0 and 15, as there are 16 colors per palette.
  131. */
  132. static uint16_t get_color(const VDP *vdp, uint8_t index, bool palette)
  133. {
  134. uint8_t offset = 2 * (index + 16 * palette);
  135. return vdp->cram[offset] + (vdp->cram[offset + 1] << 8);
  136. }
  137. /*
  138. Draw a pixel onto our pixel array at the given coordinates.
  139. The color should be in BGR444 format, as returned by get_color().
  140. */
  141. static void draw_pixel(VDP *vdp, uint8_t y, uint8_t x, uint16_t color)
  142. {
  143. uint8_t r = 0x11 * (color & 0x000F);
  144. uint8_t g = 0x11 * ((color & 0x00F0) >> 4);
  145. uint8_t b = 0x11 * ((color & 0x0F00) >> 8);
  146. uint32_t argb = (0xFF << 24) + (r << 16) + (g << 8) + b;
  147. vdp->pixels[y * 160 + x] = argb;
  148. }
  149. /*
  150. Draw the background of the current scanline.
  151. */
  152. static void draw_background(VDP *vdp)
  153. {
  154. uint8_t src_row = (vdp->v_counter + get_bg_vscroll(vdp)) % (28 << 3);
  155. uint8_t dst_row = vdp->v_counter - 0x18;
  156. uint8_t vcell = src_row >> 3;
  157. uint8_t hcell, col;
  158. uint8_t start_col = get_bg_hscroll(vdp) >> 3;
  159. uint8_t fine_scroll = get_bg_hscroll(vdp) % 8;
  160. for (col = 6; col < 20 + 6; col++) {
  161. hcell = (32 - start_col + col) % 32;
  162. uint16_t tile = get_background_tile(vdp, vcell, hcell);
  163. uint16_t pattern = tile & 0x01FF;
  164. bool palette = tile & 0x0800;
  165. bool priority = tile & 0x1000;
  166. bool vflip = tile & 0x0400;
  167. bool hflip = tile & 0x0200;
  168. uint8_t vshift = vflip ? (7 - src_row % 8) : (src_row % 8), hshift;
  169. uint8_t pixel, dst_col, index;
  170. uint16_t color;
  171. for (pixel = 0; pixel < 8; pixel++) {
  172. dst_col = ((col - 6) << 3) + pixel + fine_scroll;
  173. hshift = hflip ? (7 - pixel) : pixel;
  174. index = read_pattern(vdp, pattern, vshift, hshift);
  175. color = get_color(vdp, index, palette);
  176. draw_pixel(vdp, dst_row, dst_col, color);
  177. }
  178. }
  179. }
  180. /*
  181. Draw sprites in the current scanline.
  182. */
  183. static void draw_sprites(VDP *vdp)
  184. {
  185. uint8_t *sat = vdp->vram + get_sat_base(vdp);
  186. uint8_t spritebuf[8], nsprites = 0, i;
  187. for (i = 0; i < 64; i++) {
  188. uint8_t y = sat[i] - 1;
  189. if (vdp->v_counter >= y && vdp->v_counter < y + 8) {
  190. DEBUG("sprite draw!!!")
  191. // TODO
  192. }
  193. }
  194. }
  195. /*
  196. Draw the current scanline.
  197. */
  198. static void draw_scanline(VDP *vdp)
  199. {
  200. if (!vdp->pixels)
  201. return;
  202. draw_background(vdp);
  203. draw_sprites(vdp);
  204. }
  205. /*
  206. Advance the V counter for the next scanline.
  207. */
  208. static void advance_scanline(VDP *vdp)
  209. {
  210. if (vdp->v_counter == 0xDA)
  211. vdp->v_count_jump = !vdp->v_count_jump;
  212. if (vdp->v_counter == 0xDA && vdp->v_count_jump)
  213. vdp->v_counter = 0xD5;
  214. else
  215. vdp->v_counter++;
  216. }
  217. /*
  218. Simulate one line within the VDP.
  219. */
  220. void vdp_simulate_line(VDP *vdp)
  221. {
  222. if (vdp->v_counter >= 0x18 && vdp->v_counter < 0xA8)
  223. draw_scanline(vdp);
  224. if (vdp->v_counter == 0xC0)
  225. vdp->stat_int = true;
  226. advance_scanline(vdp);
  227. }
  228. /*
  229. Read a byte from the VDP's control port, revealing status flags.
  230. The status byte consists of:
  231. 7 6 5 4 3 2 1 0
  232. F 9S C * * * * *
  233. - F: Interrupt flag: set when the effective display area is completed
  234. - 9S: 9th sprite / Sprite overflow: more than eight sprites on a scanline
  235. - C: Collision flag: two sprites have an overlapping pixel
  236. - *: Unused
  237. The control flag is also reset.
  238. */
  239. uint8_t vdp_read_control(VDP *vdp)
  240. {
  241. uint8_t status =
  242. (vdp->stat_int << 8) + (vdp->stat_ovf << 7) + (vdp->stat_col << 6);
  243. vdp->stat_int = vdp->stat_ovf = vdp->stat_col = 0;
  244. vdp->control_flag = false;
  245. return status;
  246. }
  247. /*
  248. Read a byte from the VDP's data port.
  249. This will return the contents of the read buffer, and then fill the buffer
  250. with the VRAM at the current control address, before incrementing the
  251. control address. The control flag is also reset.
  252. */
  253. uint8_t vdp_read_data(VDP *vdp)
  254. {
  255. uint8_t buffer = vdp->read_buf;
  256. vdp->read_buf = vdp->vram[vdp->control_addr];
  257. vdp->control_addr = (vdp->control_addr + 1) % 0x3FFF;
  258. vdp->control_flag = false;
  259. return buffer;
  260. }
  261. /*
  262. Write a byte into the VDP's control port.
  263. Depending on the status of the control flag, this will either update the
  264. lower byte of the control address, or the upper six bits of the control
  265. address and the control code. The flag is toggled by each control write,
  266. and reset by each control read and data read or write.
  267. If the control code indicates a VRAM read, the read buffer will be filled
  268. with the VRAM at the given control address, which is then incremented. If
  269. the code indicates a register write, the corresponding register
  270. (byte & 0x0F) will be written with the lower byte of the control address.
  271. */
  272. void vdp_write_control(VDP *vdp, uint8_t byte)
  273. {
  274. if (!vdp->control_flag) { // First byte
  275. vdp->control_addr = (vdp->control_addr & 0x3F00) + byte;
  276. vdp->control_flag = true;
  277. return;
  278. }
  279. vdp->control_addr = ((byte & 0x3F) << 8) + (vdp->control_addr & 0xFF);
  280. vdp->control_code = byte >> 6;
  281. if (vdp->control_code == CODE_VRAM_READ) {
  282. vdp->read_buf = vdp->vram[vdp->control_addr];
  283. vdp->control_addr = (vdp->control_addr + 1) % 0x3FFF;
  284. } else if (vdp->control_code == CODE_REG_WRITE) {
  285. uint8_t reg = byte & 0x0F;
  286. if (reg <= VDP_REGS)
  287. vdp->regs[reg] = vdp->control_addr & 0xFF;
  288. }
  289. vdp->control_flag = false;
  290. }
  291. /*
  292. Write a byte into CRAM. Handles even/odd address latching.
  293. */
  294. static void write_cram(VDP *vdp, uint8_t byte)
  295. {
  296. if (!(vdp->control_addr % 2)) {
  297. vdp->cram_latch = byte;
  298. } else {
  299. vdp->cram[(vdp->control_addr - 1) % 0x3F] = vdp->cram_latch;
  300. vdp->cram[ vdp->control_addr % 0x3F] = byte % 0x0F;
  301. }
  302. }
  303. /*
  304. Write a byte into the VDP's data port.
  305. Depending on the control code, this either writes into the VRAM or CRAM at
  306. the current control address, which is then incremented. The control flag is
  307. also reset, and the read buffer is squashed.
  308. */
  309. void vdp_write_data(VDP *vdp, uint8_t byte)
  310. {
  311. if (vdp->control_code == CODE_CRAM_WRITE)
  312. write_cram(vdp, byte);
  313. else
  314. vdp->vram[vdp->control_addr] = byte;
  315. vdp->control_addr = (vdp->control_addr + 1) % 0x3FFF;
  316. vdp->control_flag = false;
  317. vdp->read_buf = byte;
  318. }
  319. /*
  320. Return whether the VDP is currently asserting an interrupt.
  321. */
  322. bool vdp_assert_irq(VDP *vdp)
  323. {
  324. // TODO: line interrupts
  325. return vdp->stat_int && should_frame_interrupt(vdp);
  326. }
  327. /*
  328. @DEBUG_LEVEL
  329. Print out all register values to stdout.
  330. */
  331. void vdp_dump_registers(const VDP *vdp)
  332. {
  333. const uint8_t *regs = vdp->regs;
  334. DEBUG("Dumping VDP register values:")
  335. // TODO: show flags
  336. DEBUG("- $00: 0x%02X (" BINARY_FMT ")", regs[0x00], BINARY_VAL(regs[0]))
  337. DEBUG("- $01: 0x%02X (" BINARY_FMT ")", regs[0x01], BINARY_VAL(regs[1]))
  338. DEBUG("- $02: 0x%02X (PNT: 0x%04X)", regs[0x02], get_pnt_base(vdp))
  339. DEBUG("- $03: 0x%02X (CT)", regs[0x03])
  340. DEBUG("- $04: 0x%02X (BPG)", regs[0x04])
  341. DEBUG("- $05: 0x%02X (SAT: 0x%04X)", regs[0x05], get_sat_base(vdp))
  342. DEBUG("- $06: 0x%02X (SGT: 0x%04X)", regs[0x06], get_sgt_base(vdp))
  343. DEBUG("- $07: 0x%02X (BDC: 0x%02X)", regs[0x07], get_backdrop_color(vdp))
  344. DEBUG("- $08: 0x%02X (HS)", regs[0x08])
  345. DEBUG("- $09: 0x%02X (VS)", regs[0x09])
  346. DEBUG("- $0A: 0x%02X (LC)", regs[0x0A])
  347. // TODO: remove me!
  348. DEBUG("Dumping CRAM:")
  349. for (uint8_t i = 0; i < 32; i += 8) {
  350. uint16_t w[8];
  351. for (uint8_t j = 0; j < 8; j++)
  352. w[j] = get_color(vdp, (i + j) % 16, i & 16);
  353. DEBUG("- %04X %04X %04X %04X %04X %04X %04X %04X",
  354. w[0], w[1], w[2], w[3], w[4], w[5], w[6], w[7])
  355. }
  356. return;
  357. DEBUG("Dumping PNT:")
  358. for (uint16_t i = 0; i < 28 * 32; i += 32) {
  359. uint16_t w[32];
  360. for (uint8_t j = 0; j < 32; j++)
  361. w[j] = vdp->vram[get_pnt_base(vdp) + 2 * (i + j)] +
  362. (vdp->vram[get_pnt_base(vdp) + 2 * (i + j) + 1] << 8);
  363. DEBUG("- %03X %03X %03X %03X %03X %03X %03X %03X"
  364. " %03X %03X %03X %03X %03X %03X %03X %03X"
  365. " %03X %03X %03X %03X %03X %03X %03X %03X"
  366. " %03X %03X %03X %03X %03X %03X %03X %03X",
  367. w[0x00], w[0x01], w[0x02], w[0x03], w[0x04], w[0x05], w[0x06], w[0x07],
  368. w[0x08], w[0x09], w[0x0A], w[0x0B], w[0x0C], w[0x0D], w[0x0E], w[0x0F],
  369. w[0x10], w[0x11], w[0x12], w[0x13], w[0x14], w[0x15], w[0x16], w[0x17],
  370. w[0x18], w[0x19], w[0x1A], w[0x1B], w[0x1C], w[0x1D], w[0x1E], w[0x1F])
  371. }
  372. DEBUG("Dumping PGT:")
  373. for (uint16_t i = 0; i < /* 512 */ 16; i++) {
  374. uint32_t w[8];
  375. for (uint8_t j = 0; j < 8; j++)
  376. w[j] = vdp->vram[32 * i + 4 * j] +
  377. (vdp->vram[32 * i + 4 * j + 1] << 8) +
  378. (vdp->vram[32 * i + 4 * j + 2] << 16) +
  379. (vdp->vram[32 * i + 4 * j + 3] << 24);
  380. DEBUG("- 0x%04X: %08X %08X %08X %08X %08X %08X %08X %08X", i,
  381. w[0], w[1], w[2], w[3], w[4], w[5], w[6], w[7])
  382. }
  383. }